Saravanan Dorairaj

Engineering Manager

Bengaluru, Karnataka, India33 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

25+ years in semiconductor industry leadership
Expert in VLSI testing and validation
Proven track record in team management and innovation

Stackforce AI infers this person is a semiconductor industry expert with strong leadership in engineering and product development.

Contact

Skills

Core Skills

DfxEngineering ManagementTest EngineeringProduct EngineeringValidationManufacturing

Other Skills

Intel GraphicsScan test content developmentIntel GFX IPsPost-silicon system validationIntel SOCsATE engineeringPost-silicon validationTest operations managementCustom test solutionsEngineering maintenanceSemiconductor assemblyICMicroprocessorsRFTest Equipment

About

Technical leader with 25+ years of experience in the semiconductor industry, specializing in VLSI testing, validation, and DFX. Proven track record of building and leading diverse global teams, driving innovation, and delivering high-quality results in manufacturing and R&D with leading industry players. Known for combining strong technical expertise with strategic leadership to accelerate product development, improve efficiency, and foster collaboration. Passionate about advancing semiconductor technology and mentoring the next generation of engineers.

Experience

33 yrs 9 mos

Total Experience

11 yrs 3 mos

Average Tenure

20 yrs 10 mos

Current Experience

Intel corporation

4 roles

Engineering Manager

Jan 2019 – Present · 7 yrs 3 mos

DFX delivery for Intel Graphics

DFXIntel GraphicsEngineering Management

Engineering Manager

Jul 2013 – Jan 2019 · 5 yrs 6 mos

Manage scan test content development for Intel GFX IPs.

Scan test content developmentIntel GFX IPsTest EngineeringProduct Engineering

Engineering Manager

Promoted

Jan 2011 – Jul 2013 · 2 yrs 6 mos

Managed execution of post-silicon system validation of Intel SOCs.

Post-silicon system validationIntel SOCsValidationEngineering Management

Technical Lead - ATE Engineering

May 2005 – Dec 2010 · 5 yrs 7 mos

Managed engineering and operations of ATE based post-silcon validation support
for multi-core CPUs .

ATE engineeringPost-silicon validationTest EngineeringValidation

National semiconductor

Technical Manager - LTCC Test operations Irvine CA / Senior RF Test Engineer , Singapore

Sep 1995 – Apr 2005 · 9 yrs 7 mos · IRVINE CA / Singapore

Managed test operations of LTCC module test facility in Irvine ,California including sub-cons in Asia. Developed custom test solutions for RF LTCC modules .
Responsible for test-development ,manufacturing-release and yield-improvement for transceivers ,GSM and DECT based RF products at National Semi Conductors , Singapore .

Test operations managementCustom test solutionsTest EngineeringManufacturing