Poornima H R

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience
Highly Stable

Key Highlights

  • Senior Engineer with expertise in ASIC design.
  • Proficient in Automatic Test Pattern Generation.
  • Strong foundation in Electrical Engineering principles.
Stackforce AI infers this person is a VLSI design engineer with a focus on ASIC development.

Contact

Skills

Core Skills

Automatic Test Pattern Generation (atpg)Bist

Other Skills

Electrical EngineeringApplication-Specific Integrated Circuits (ASIC)Shell ScriptingDFTVerilogPerlTCLDebuggingIntel Quartus PrimeCPython (Programming Language)ModelsimCadence VirtuosoStatic Timing Analysis

Experience

3 yrs 9 mos
Total Experience
3 yrs 9 mos
Average Tenure
3 yrs 9 mos
Current Experience

Mediatek

2 roles

Senior Engineer

Jul 2022Present · 3 yrs 9 mos

Automatic Test Pattern Generation (ATPG)BIST

Intern

Sep 2021Jun 2022 · 9 mos

Automatic Test Pattern Generation (ATPG)BIST

Education

Vellore Institute of Technology

Master of Technology - MTech — VLSI

Jan 2020Jan 2022

Mar Baselios College of Engineering and Technology (Autonomous) | Thiruvananthapuram | Kerala

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jan 2014Jan 2018

Christ Nagar School

ICSE

Jan 2000Jan 2014

Stackforce found 58 more professionals with Automatic Test Pattern Generation (atpg) & Bist

Explore similar profiles based on matching skills and experience