Nivedita Singh

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience
Highly Stable

Key Highlights

  • Experienced in ASIC Physical Design at Intel.
  • Proficient in Static Timing Analysis and Physical Verification.
  • Strong background in Place & Route methodologies.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC design and physical verification.

Contact

Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

Place & RouteFloorplanningPhysical VerificationSynopsys PrimetimeSynopsys toolsCalibre

Experience

7 yrs 9 mos
Total Experience
3 yrs
Average Tenure
1 yr 9 mos
Current Experience

Intel corporation

ASIC Physical Design Engineer

Jul 2024Present · 1 yr 9 mos · Bengaluru, Karnataka, India · Hybrid

Place & RouteFloorplanningPhysical DesignStatic Timing AnalysisPhysical VerificationSynopsys Primetime+2

Amd

Senior Physical Design Engineer

Feb 2022Jul 2024 · 2 yrs 5 mos · Bengaluru, Karnataka, India

Qualcomm

Physical Design Engineer

Jul 2018Feb 2022 · 3 yrs 7 mos · Bangalore

Education

MKSSS Cummins College of Engineering for Women

Electronics and telecommunication engineering

Jan 2014Jan 2018

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