Pratik Dave

Software Engineer

Bengaluru, Karnataka, India4 yrs 2 mos experience
Highly Stable

Key Highlights

  • Expert in Static Timing Analysis and Logic Synthesis.
  • Proven track record in Physical Design Flow.
  • Strong foundation in Signal Processing and VLSI Technology.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in timing analysis and synthesis.

Contact

pratikdave050@gmail.comLinkedIn

Skills

Core Skills

Static Timing AnalysisLogic Synthesis

Other Skills

Timing ClosurePhysical Design FlowTCL

About

Something I know, Something I am learning

Experience

4 yrs 2 mos
Total Experience
4 yrs 2 mos
Average Tenure
4 yrs 2 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Promoted

Jun 2023 – Present · 2 yrs 10 mos

Static Timing AnalysisTiming ClosurePhysical Design FlowLogic SynthesisTCL

Senior Engineer

Promoted

Feb 2022 – Jun 2023 · 1 yr 4 mos

Engineer

Oct 2019 – Feb 2022 · 2 yrs 4 mos

Rv-vlsi vlsi and embedded systems design center

Trainee Physical Design Engineer

Nov 2018 – May 2019 · 6 mos · Bengaluru Area, India

Education

Vishwakarma Government Engineering College

Master of Engineering - ME — Signal Processing and VLSI Technology

Jan 2015 – Jan 2017

Government Engineering College, Bhavnagar

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 2010 – Jan 2014

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