ARCHANA R.NAIR — Product Engineer
Currently working in Intel Corporation as Physical Design Clocking Engineer. Handling clock design and Timing Closure (STA) for different blocks. Completed 1 year internship in Intel Corporation itself. Did M. Tech VLSI Design in Amrita Vishwa Vidyapeetham, Kollam 2020-22
Stackforce AI infers this person is a VLSI design engineer with a focus on timing analysis in semiconductor industry.
Location: Kottayam, Kerala, India
Experience: 3 yrs 9 mos
Skills
- Very-large-scale Integration (vlsi)
- Static Timing Analysis (sta)
Career Highlights
- Expertise in VLSI design and timing closure.
- One year of hands-on experience at Intel Corporation.
- Strong academic background with first-class distinction.
Work Experience
Intel Corporation
SoC Design Engineer (3 yrs 9 mos)
Graduate Technical Intern at Intel Corporation (1 yr)
Education
Master of Technology - MTech at Amrita Vishwa Vidyapeetham
B. Tech with Honors at Rajiv Gandhi Institute of Technology, Kottayam
Higher secondary at M G M N S S H S S Lakkattoor