Ritu Dubey

Software Engineer

Bengaluru, Karnataka, India10 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in high-frequency and low-power design.
  • Experience with advanced technology nodes down to 3nm.
  • Proficient in complete PnR to Sign-Off processes.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Timing Analysis.

Contact

LinkedIn

Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

IR Analysis and fixingDesign Rule Checking (DRC)Very-Large-Scale Integration (VLSI)ICC2Synopsys PrimetimeCalibreTempusInnovusGenus

About

Graduated in Electronics and Instrumentation ,worked on high frequency block in AMD and low power design in Mediatek .Having experience in complete PnR to Sign-Off, with focus on floorplaning , timing optimization , DRCs and IR,Em Fixing,STA . Worked on advance technology nodes (7nm/5nm/4nm/3nm on AMD/Mediatek PROJECTS ) and desire for more challenging projects and responsibility in Semiconductor industry .

Experience

10 yrs 7 mos
Total Experience
3 yrs 6 mos
Average Tenure
4 yrs 5 mos
Current Experience

Mediatek

Staff Engineer

Nov 2021 – Present · 4 yrs 5 mos

Physical DesignStatic Timing AnalysisIR Analysis and fixingDesign Rule Checking (DRC)Very-Large-Scale Integration (VLSI)ICC2+5

Synapse design inc.

Project Engineer

Apr 2017 – Oct 2021 · 4 yrs 6 mos

Asilcon design

Project Engineer

Aug 2015 – Apr 2017 · 1 yr 8 mos

Education

C.V RAMAN COLLEGE OF ENGG

Bachelor of Technology - BTech — Applied Electronics and Instrumentation

Jan 2011 – Jan 2015

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Ritu Dubey - Software Engineer | Stackforce