VIVEK SARASWAT

Software Engineer

Mathura, Uttar Pradesh, India10 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 6 years of experience in SoC verification.
  • Expert in low power verification and debugging.
  • Strong background in RTL and SystemVerilog.
Stackforce AI infers this person is a SoC verification expert with a focus on low power and debugging in the semiconductor industry.

Contact

Skills

Core Skills

System On A Chip (soc)Low Power VerificationDebugging

Other Skills

AMBA AHBAXIRTL VerificationSVUniversal Verification Methodology (UVM)Gate Level SimulationVerlogSystem VerificationSystemVerilogDesign verificationsecurity verificationVerilogEmbedded SystemsCadenceMentor Graphics

About

6 years of working experience on SOC verification

Experience

10 yrs 3 mos
Total Experience
5 yrs 1 mo
Average Tenure
8 yrs 3 mos
Current Experience

Qualcomm

4 roles

Staff Engineer

Nov 2025Present · 5 mos

Low power verificationAMBA AHBSystem on a Chip (SoC)

Senior Lead Engineer

Promoted

Nov 2022Oct 2025 · 2 yrs 11 mos

Debugging

Senior Engineer

Nov 2019Oct 2022 · 2 yrs 11 mos

Engineer

Jul 2017Jul 2019 · 2 yrs · Noida, Uttar Pradesh, India · On-site

Debugging

Motilal nehru institute of technology

M.tech ( Digital Systems)

Jul 2015Jul 2017 · 2 yrs · Allahabad , India

Education

Motilal Nehru National Institute Of Technology

Master’s Degree — DIGITAL SYSTEMS

Jan 2015Jan 2017

Kamla Nehru Institute of Technology, Sulanpur

Bachelor’s Degree

Jan 2009Jan 2013

sjbsv mandir mathura

class VI to XII

Jan 2002Jan 2008

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