Murugan A — Engineering Manager
• Leading end-to-end verification for PCIe controllers, Switch, and Tunneling across IP, Subsystem, and next-generation SoCs. • Proven expertise in IP and Subsystem testbench architecture, development, and verification — from initial design to coverage closure. • Experienced in architecting and developing layered and memory VIPs from scratch. • Strong proficiency in low-power (UPF) and NoC verification. • In-depth hands-on experience with high-speed and memory protocols including PCIe, CXL, SD/eMMC, GDDR5, and AMBA. • Skilled in verification languages and scripting: SystemVerilog (SV), UVM, and Perl.
Stackforce AI infers this person is a Verification Engineer specializing in PCIe and SoC technologies.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 6 mos
Skills
- Verification
- Pcie
Career Highlights
- Expert in PCIe and SoC verification.
- Proficient in low-power and NoC verification.
- Strong background in layered and memory VIPs development.
Work Experience
MediaTek
Engineering Manager (1 yr 9 mos)
Lead Project Manager (2 yrs 8 mos)
Synopsys Inc
Senior Engineer II (1 yr)
Senior Engineer I (3 yrs 1 mo)
MediaTek
Senior Engineer (2 yrs 1 mo)
Whizchip Design Technologies Pvt Ltd
Verification Engineer (3 yrs 8 mos)
INDIAN INSTITUTE OF VLSI DESIGN AND TRAINING
Trainee Engineer (3 mos)
Education
Bachelor’s Degree at Anna University Chennai
