Ravalika Vemula — Software Engineer

• 2.9 years of experience as ASIC Verification. • Protocol Knowledge on NVMe, PCIe Gen3 and Gen4 (PL), xHCI (USB3.0), AMBA CHI, AXI4. • Hands-on experience on PCIe Physical Layer and USB3.0 Host protocol verification. • Experience on verifying RTL using SystemVerilog/UVM. • Experience on AVERY VIP environment for PCIE, NVMe and AXI4. Good knowledge on c, perl, Micro architectures, verilog, system verilog, OOPs, UVM. Tools : Questa sim, VCS, Xrun

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC design and protocol verification.

Location: Hyderabad, Telangana, India

Experience: 7 yrs 9 mos