Yashwanth Motlapalli — Software Engineer
As a Physical Design Engineer at AMD, I contribute to ASIC design projects by leveraging my skills in Synopsys tools, Cadence, and Calibre to enhance semiconductor solutions. My role focuses on optimizing performance and power consumption in alignment with project goals. With an MTech in Power Electronics from CMR College of Engineering & Technology and prior training as an ASIC Physical Design Trainee at SumedhaIT, I bring a comprehensive understanding of electrical and electronics engineering. My commitment to professional growth drives me to stay updated on advancements in semiconductor design technologies.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC physical design.
Location: Hyderabad, Telangana, India
Experience: 3 yrs 1 mo
Skills
- Physical Design
- Asic Design
Career Highlights
- Expert in ASIC design and physical design engineering.
- Strong foundation in power electronics and semiconductor technologies.
- Proficient in industry-standard tools like Synopsys and Cadence.
Work Experience
AMD
Physical Design Engineer (2 yrs 2 mos)
SumedhaIT
ASIC Physical Design Trainee (11 mos)
Education
Master of Technology - MTech at CMR College of Engineering & Technology
Bachelor of Technology - BTech at Vardhaman College of Engineering (VCEH)
Diploma at Jawaharlal Nehru Government Polytechnic
Matriculation at GREENWOOD HIGH SCHOOL
