VEMALA SRAVANI — Software Engineer
Stackforce AI infers this person is a semiconductor verification engineer with expertise in design for test methodologies.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs 7 mos
Skills
- Soc Dft Verification
- Soc15 Architecture
- Synopsys Tools
- Verilog
Career Highlights
- Expert in SOC DFT verification methodologies.
- Proficient in Synopsys tools for design verification.
- Strong background in Verilog and SystemVerilog.
Work Experience
SmartSoC Solutions Pvt Ltd
DFX_DV Engineer (9 mos)
AMD
DFX_DV Engineer (9 mos)
Gaafet Semiconductor Pvt Ltd
Design and Verification Engineer (1 yr)
TrueScale Technologies Pvt Ltd
Design and Verification Engineer (1 yr 10 mos)
Education
B. Tech at Jawaharlal Nehru Technological University Kakinada (JNTUK)