yadagiri p — Software Engineer

Having experience on ARM based SoC Verification.  System Verilog, Verilog, C  Methodology: OVM,UVM  Protocols: SATA, AXI,USB3.0, H.264, Ethernet  Involved in Constrained Random and Assertion based Verification.  Knowledge on AXI Bus protocols and SERDES.  Working experience on GLS.  Worked in various projects involving Development of different model’s for verification environment.  Hands on experience in developing Verification Environment, Test Plans, Test Cases and Functional Models at Top level and Block level.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SoC and Functional Verification.

Location: Telangana, India

Experience: 18 yrs 2 mos