Manoj Mohan — Software Engineer
- Actively seeking full-time opportunities in the fields of Digital IC/Hardware/FPGA Design/Verification, Memory Design, Physical Design or Computer Architecture. - Graduate Student in Electrical Engineering at The University of Texas at Dallas Technical Exposure: Programming Languages : C, Embedded C, C++, LabView, MatLab Scripting Languages - Shell, Perl, TCL Assembly Level Programming IDE : Keil µVision, Code Composer Studio HDL : Verilog, VHDL, System Verilog Synthesis Tools : Xilinx, RTL Compiler, Design Compiler, Quartus Layout Tools : Cadence Virtuoso Place and Route Tool : Cadence Encounter, AtopTech Physical Verification Tools: Cadence Assura Parasitics Extraction Tools: Cadence Quantus RC, Synopsys StarRC Static Timing Analysis : Primetime Verification Tool : Cadence Encounter Test ATPG : Tetramax Simulation Tool : Modelsim, HSPICE Operating Systems : Windows, UNIX
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and FPGA development.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs 2 mos
Skills
- Asic Design
- Floating Point Design
- Physical Design
- Timing Analysis
- Software Development
- Communication Systems
Career Highlights
- Expertise in ASIC design and verification.
- Strong background in physical design and timing analysis.
- Proficient in multiple programming and scripting languages.
Work Experience
MediaTek
Engineer (8 yrs 9 mos)
Scalable Systems Research Labs Inc.
ASIC Design Engineer (9 yrs 5 mos)
Broadcom
IC Design Intern (4 mos)
Bharat Electronics
Deputy Engineer (2 yrs 9 mos)
Education
Master's degree at The University of Texas at Dallas
Bachelor's degree at Visvesvaraya Technological University