Sahil Bhadwal

Software Engineer

Bengaluru, Karnataka, India5 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in CPU verification at MediaTek.
  • Strong foundation in SystemVerilog and processor verification.
  • Graduate from BITS Pilani with MTech in Embedded & VLSI.
Stackforce AI infers this person is a VLSI verification engineer with expertise in embedded systems.

Contact

LinkedIn

Skills

Core Skills

SystemverilogProcessor Verification

Other Skills

System VerificationJasperGoldFormal VerificationMIPS AssemblyMIPS Instruction SetMicrosoft OfficeCustomer ServiceManagementMicrosoft ExcelProject ManagementMicrosoft WordLeadershipPowerPointResearchStrategic Planning

Experience

5 yrs 2 mos
Total Experience
2 yrs 7 mos
Average Tenure
3 yrs 10 mos
Current Experience

Mediatek

2 roles

Senior Design Verification Engineer

Jul 2022 – Present · 3 yrs 10 mos · Bengaluru, Karnataka, India · On-site

SystemVerilogProcessor verification

Internship Trainee

Jan 2022 – Jun 2022 · 5 mos · Bengaluru, Karnataka, India · On-site

Tata consultancy services

Assistant System Engineer

Dec 2017 – Apr 2019 · 1 yr 4 mos · Bengaluru, Karnataka

Industrial automation training centre

Engineering Intern

Jun 2015 – Jul 2015 · 1 mo · chandigarh

Education

Birla Institute of Technology and Science, Pilani

Master of Technology - MTech — Embedded & VLSI

Jul 2021 – Jul 2023

National Institute of Technology Hamirpur-Alumni

Bachelor’s Degree — electrical and electronics engineering

Jan 2013 – Jan 2017

C.R.C GSSS, REHAN

SCIENCE

Jan 2010 – Jan 2012

Stackforce found 100+ more professionals with Systemverilog & Processor Verification

Explore similar profiles based on matching skills and experience

DARSHAN MEHTA

DARSHAN MEHTA

Lead Software Engineer

at Cadence Design Systems

Ahmedabad, India8 yrs 7 mos exp
NVM Express (NVMe)Python (Programming Language)
Kumar Rohit

Kumar Rohit

Contract Consultant

at Intel Corporation

Noida, India23 yrs 2 mos exp
VerificationUVMImage ProcessingSoC VerificationSoC Integration
Vijay Chinchole

Vijay Chinchole

Director, DRAM & Emerging Memory Group at Micron Technology

at Micron Technology

Bengaluru, India25 yrs 3 mos exp
People ManagementSoCFormal VerificationFunctional Verification
Vishwa Patel

Vishwa Patel

DFT Engineer

at MediaTek

Bengaluru, India5 yrs 3 mos exp
DFTUniversal Verification Methodology (UVM)
Jatin Aery

Jatin Aery

SoC Design Engineer

at Intel Corporation

Bengaluru, India2 yrs exp
SoC Design
Shreya S

Shreya S

Silicon Design Engineer 2

at AMD

Bengaluru, India10 mos exp
Static Timing AnalysisPhysical Design
Siddamreddy Sudhakar Reddy

Siddamreddy Sudhakar Reddy

Design Verification Engineer

at MediaTek

Kurnool, India5 yrs 1 mo exp
Universal Verification Methodology (UVM)Digital ElectronicsSAP Business Warehouse (SAP BW)Advanced Business Application Programming (ABAP)
ST

Sanjay Tarihalli

Intern

at Synopsys Inc

Bengaluru, India3 mos exp
C (Programming Language)Verilog