Krati Haldiya

Software Engineer

Bengaluru, Karnataka, India1 yr 9 mos experience

Key Highlights

  • Masters in VLSI design with hands-on experience.
  • Internship at ISRO focusing on IP block development.
  • Proficient in multiple EDA tools and programming languages.
Stackforce AI infers this person is a VLSI design engineer with a focus on semiconductor development.

Contact

Skills

Core Skills

Digital Ic DesignStatic Timing Analysis

Other Skills

Synopsys Design CompilerVC Spyglass lintSynopsys PrimetimeCadence VirtuosoVerilogPythonCDC compilerPrimeTimeSpygateCandance VirtuosoVisual TCADIntel Quartus PrimeDigital design using FPGASTA

About

Hello, I am Krati Haldiya currently pursuing Masters in VLSI design @ VIT, Chennai. Skills: Languages - Verliog , Python , C EDA tools:- DC complier, PrimeTime, Spygate, Candance Virtuoso , Visual TCAD , Intel Quartus Prime Technical skills - Digital IC design , STA, Digital design using FPGA Interest subjects - CAD , VLSI testing and testability my resume - https://drive.google.com/file/d/1-58MCkTLQyBoJslsI8V1GuQDC5xtVYY-/view?usp=drivesdk I am also interested in a bit Psychology and a very sporty person .PS, I have played nationals(in what if you may ask basically Martial arts ), keeps life interesting.

Experience

1 yr 9 mos
Total Experience
1 yr 9 mos
Average Tenure
1 yr 9 mos
Current Experience

Mediatek

VLSI engineer

Jul 2024Present · 1 yr 9 mos · Bengaluru · On-site

Synopsys Design CompilerVC Spyglass lintSynopsys PrimetimeCadence VirtuosoVerilogStatic Timing Analysis+1

Space applications centre, isro

Intern

Jan 2024Jun 2024 · 5 mos · Ahemdabad · On-site

  • I am currently working on the IP block , running lint and synthesis and writing up mcmm flow for the following design.
Synopsys Design CompilerVerilogDigital IC design

Education

Vellore Institute of Technology

Master of Technology - MTech — VLSI

Sep 2022Jul 2024

Indira Gandhi National Open University

Masters of psychology

Jul 2021Present

Poornima College of Engineering

Bachelor of Technology — Electrical and Electronics Engineering

Jan 2015Jan 2019

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