Naincy Pandey

Product Engineer

India0 mo experience

Key Highlights

  • Strong foundation in Digital IC Design.
  • Experience with Assertion Based Verification.
  • Pursuing M.Tech in Microelectronics and VLSI Design.
Stackforce AI infers this person is a VLSI Design Intern with a focus on Digital IC Design.

Contact

LinkedIn

Skills

Core Skills

Digital Ic Design

Other Skills

Assertion Based VerificationSystemVerilogVerilogStatic Timing AnalysisAnalog Integrated Circuit DesignCadence VirtuosoDigital ElectronicsC++

Experience

0 mo
Total Experience
--
Average Tenure
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Current Experience

Intel corporation

Graduate Technical Intern

Jul 2025 – Present · 9 mos · Bengaluru, Karnataka, India · On-site

Assertion Based VerificationSystemVerilogDigital IC Design

Indian institute of information technology allahabad

Summer Trainee

Jun 2022 – Jul 2022 · 1 mo · Remote

Education

Motilal Nehru National Institute Of Technology

Master of Technology - MTech — Microelectronics and VLSI Design

Jan 2024 – Jan 2026

GL Bajaj Institute of Technology and Management

Bachelor of Technology - BTech — Electronics and Communication Engineering

Jan 2019 – Jan 2023

LUCKNOW PUBLIC SCHOOL

Intermediate — PCM

Apr 2018 – May 2019

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