YOGITA .

Software Engineer

Delhi, India5 yrs 8 mos experience
Highly Stable

Key Highlights

  • Experienced in VLSI design and analog modeling.
  • Proficient in Verilog and SystemVerilog for hardware design.
  • Hands-on experience with advanced semiconductor technologies.
Stackforce AI infers this person is a VLSI Engineer with expertise in semiconductor design and analog systems.

Contact

LinkedIn

Skills

Core Skills

VerilogSystemverilogAnalog Design

Other Skills

ANSYS HFSSC (Programming Language)Microsoft WordMicrosoft PowerPointCadence VirtuosoSynopsys PrimetimesiliconsmartTSMC 3nm technology

Experience

5 yrs 8 mos
Total Experience
5 yrs 8 mos
Average Tenure
5 yrs 8 mos
Current Experience

Intel corporation

2 roles

SIPI Engineer

Aug 2021 – Present · 4 yrs 9 mos · Bengaluru, Karnataka, India

ANSYS HFSSC (Programming Language)VerilogSystemVerilogMicrosoft WordMicrosoft PowerPoint+3

Intern

Jul 2020 – Jun 2021 · 11 mos · Bengaluru, Karnataka, India

  • Analog Design Engineer
  • Behavioral modeling and timing generation of custom building blocks of MDIO (Multi Die IO) IP using TSMC 3nm technology.
Analog Design

Education

National Institute of Technology Karnataka

Master of Technology - MTech — VLSI DESIGN

Jan 2019 – Jan 2021

Delhi University

Bachelor of Technology - BTech

Jan 2013 – Jan 2017

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