Nasiruz zama

Consultant

Bengaluru, Karnataka, India7 yrs 8 mos experience

Key Highlights

  • 12 years of experience in VLSI Verification.
  • Expert in RTL Design and Functional Verification.
  • Proficient in low power verification techniques.
Stackforce AI infers this person is a VLSI Verification Specialist with expertise in low power and functional verification.

Contact

Skills

Core Skills

Rtl DesignFunctional VerificationLow Power Verification

Other Skills

AMD Flow ConversionTest Case QualificationDevice Manager Control Path VerificationPower Control Block Verification5G Modem VerificationSOC VerificationLow Power DebuggingVerification of PSF and PSTH BlockSOC Level VerificationTest Case DevelopmentVerification of I2C, UART, GPIONCSimCadenceSystemVerilogModelSim

About

12 years of experienced in Verification(VLSI) and has good credentials on my name. RTL Design and Verification using below mentioned tools and processes: Low power Verification. AMD flow conversion bring-up. Simulation: NCSIM (Cadence), IUS(Cadence) Functional Verification for module level in Simvision(Cadence) and for top level in nWave (Novas) ARM assembly language based SoC verification based on CORTEX R5 processor using VCS MX Training Attended :- under gone WIPRO internal training for SV and UVM PMIC-Functional IP Verification for 3 modules Involved in Chip level verification Involved in GLS simulation Design Convention Check (Lint); Clock Reset Check (CDC) and Electrical rule check (ERC) using Spyglass (Atrenta) Rtl to Gate-level netlist (R2G) Logical equivalence check using Encounter Conformal EC (Cadence) Wipro Internal project:- worked on I2C, UART and SPI Programming Languages :Verilog, VHDL, Unix, C,UVM Specialties Verilog,VHDL,SV ARM A15. Pre and Post silicon verification.Module handling EMIF(external memory intereface) and Hyperlink interface. EMIF is to connect external memory like Nand flash, Sram and Nor. Presently responsible for developing test case for the two IPs(EMIF and HYPERLINK) and Functional verification as well as Throughput Validation in ARM and DSP environment.

Experience

7 yrs 8 mos
Total Experience
1 yr 6 mos
Average Tenure
--
Current Experience

Amd

Senior Consultant

Oct 2021Present · 4 yrs 6 mos · Shanghai, China · Remote

  • Work on Complete AMD Flow Conversion. Complete TDL flow conversion from old DV flow and qualified all existing tests cases in new TDL flow.
AMD Flow ConversionTest Case QualificationRTL DesignFunctional Verification

Microchip technology inc.

Senior Consultant

May 2019Aug 2021 · 2 yrs 3 mos · Greater Bengaluru Area

  • Worked on Verification of Device Manager control path and low power verification.
Device Manager Control Path VerificationLow Power VerificationFunctional Verification

Intel corporation

Senior Consultant

May 2018Apr 2019 · 11 mos · Greater Bengaluru Area

  • Worked as senior consultant for Intel. worked on Power control block verification of 5g modem. Worked On low power verification for 5g modem.
Power Control Block Verification5G Modem VerificationFunctional VerificationLow Power Verification

Altran

Advance Verification Engineer

Apr 2017May 2018 · 1 yr 1 mo · Greater Bengaluru Area

  • Worked as SOC Verification Engineer @ low power verification. Worked power management verification and low power debugs. Also worked on GLS.
SOC VerificationLow Power DebuggingFunctional VerificationLow Power Verification

Ust global

Technical Analyst(ASIC/SOC Verification Engineer)

Jan 2016Apr 2017 · 1 yr 3 mos · Greater George Town

  • Responsible for complete Verification of PSF and PSTH Block.
  • PSF is a Intel specific interconnect used for PCH (Platform controller HUB)
Verification of PSF and PSTH BlockFunctional Verification

Sasken communication technologies

Advanced Chip Design Engineer

Jul 2014Jan 2016 · 1 yr 6 mos · Greater Bengaluru Area

  • Soc Level Verification
  • Was responsible for Soc level verification of Video Block. Responsible for coding new test cases and validating the last existing test.
SOC Level VerificationTest Case DevelopmentFunctional Verification

Wipro technologies

Project Engg

May 2011Apr 2014 · 2 yrs 11 mos · Bangalore Area, India

  • .
  • 1. Responsible for verification of three IPs I2C,UART, GPIO.
  • 2. Handling functional verification for two IPs specific to customer requirement (BCU, Coloumb Counter).
  • 3 Responsible for the verification and validation of two IPs (EMIF and HYPERLINK)
  • 4 GLS
Verification of I2C, UART, GPIOFunctional Verification

Education

VTU

Bachelor of Engineering (B.E.) — Electronics and Communications Engineering

Jan 2006Jan 2010

AMU

HSC — PCM

Jan 2002Jan 2005

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