ARCHIT KATIYAR — Software Engineer
Good knowledge of the System Verilog, Xilinx vivado and FPGA design flow.
Stackforce AI infers this person is a Digital Design Engineer with expertise in ASIC and FPGA technologies.
Location: Bengaluru, Karnataka, India
Experience: 6 yrs 8 mos
Skills
- Rtl Design
- Pcie
- System Verilog
- Xilinx Vivado
Career Highlights
- Expertise in System Verilog and FPGA design.
- Proven experience in developing RTL code for PCIe.
- Strong background in digital electronics and telecommunications.
Work Experience
Synopsys Inc
Senior ASIC Digital Design Engineer (1 yr 3 mos)
Qbit Labs Private Limited
RTL Design Engineer ll (9 mos)
RTL Design- R & D Engineer (2 yrs 11 mos)
KPIT
Engineering Trainee (1 yr 8 mos)
Education
Bachelor of Technology at Motilal Nehru National Institute Of Technology
