Ankur Kaushik

Software Engineer

Delhi, India13 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in VLSI design and implementation.
  • Proficient in static timing analysis and synthesis.
  • Strong background in functional verification and debugging.
Stackforce AI infers this person is a VLSI design expert with extensive experience in chip implementation and timing analysis.

Contact

LinkedIn

Skills

Other Skills

VLSIVerilogI2CVHDLModelSimCUnixFunctional VerificationStatic Timing AnalysisDebuggingLogic SynthesisSynopsys Primetimedesign compilerSoCC++

Experience

13 yrs 11 mos
Total Experience
4 yrs 7 mos
Average Tenure
9 yrs 8 mos
Current Experience

Qualcomm

4 roles

Senior Staff Engineer

Promoted

Dec 2024 – Present · 1 yr 4 mos

Staff Engineer

Dec 2021 – Present · 4 yrs 4 mos

  • Chip Implementation .

Sr. Lead Engineer

Dec 2018 – Dec 2021 · 3 yrs

Senior Design Engineer

Aug 2016 – Dec 2018 · 2 yrs 4 mos

  • STA/synthesis

Stmicroelectronics

Sr. Design Engineer

Mar 2014 – Aug 2016 · 2 yrs 5 mos · Greater Noida

  • STA/Synthesis engineer .

Igate

Senior Engineer

May 2012 – Mar 2014 · 1 yr 10 mos · Pune/Pimpri-Chinchwad Area

  • STA & Synthesis

Education

CDAC , INDIA

PG DIPLOMA — VLSI DESIGN AND EMBEDDED SYSTEM

Jan 2011 – Jan 2012

Maharshi Dayanand University

Bachelor of Technology (B.Tech.) — Electronics and Communications Engineering

Jan 2007 – Jan 2011

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