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Sharanya Deshpande

DevOps Engineer

Bengaluru, Karnataka, India9 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Lead Design Engineer with expertise in VLSI.
  • Strong background in digital logic design.
  • Proven experience in low power design teams.
Stackforce AI infers this person is a VLSI Design Engineer with a focus on low power and SOC design.

Contact

LinkedIn

Skills

Core Skills

Very-large-scale Integration (vlsi)Digital Logic DesignVlsiSoc Design

Other Skills

Application-Specific Integrated Circuits (ASIC)Static Timing AnalysisCLinuxMicrosoft ExcelLeadershipMicrosoft OfficeMicrosoft WordCustomer ServiceBasic ElectronicsMultisimMatlabCommunicationElectronicsPerl

Experience

9 yrs 8 mos
Total Experience
3 yrs 3 mos
Average Tenure
6 yrs 5 mos
Current Experience

Qualcomm

Lead Design Engineer

Nov 2019 – Present · 6 yrs 5 mos

  • part of low power team
Very-Large-Scale Integration (VLSI)Digital Logic DesignApplication-Specific Integrated Circuits (ASIC)Static Timing Analysis

Intel corporation

SOC DESIGN ENGINEER

Mar 2017 – Nov 2019 · 2 yrs 8 mos · Bangalore

  • part of PD team
VLSICLinuxSOC Design

Rv-vlsi design center

Physical Design Trainee

Aug 2016 – Mar 2017 · 7 mos · Bangalore

Education

MARWADI EDUCATION FOUNDATION AND GROUP OF INSTITUTIONS

Bachelor of Engineering (BE) — Electronics and Communications Engineering

Jan 2012 – Jan 2016

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