Ameer Shaik — Software Engineer
Worked in Intel as SoC Design Engineer for 2+ years. Worked in Mediatek as a Physical Design Staff Engineer for 4+ years. Worked in Synapse Techno Design as a Physical Design Engineer for 2+ years. - Having Industry oriented knowledge on Physical Design. - 1 year of experience in Bharat Electronics Limited as a GAP Trainee - Good understanding of the CMOS Design, Digital Design, ASIC design flow. - Expertise in Synthesis and Physical Design. - Good knowledge in Static Timing Analysis and Cross Talk Analysis. - Good Understanding of IR-DROP and OCV. - Designed Standard Cells in Full Custom Design at 40nm. Familiar with EDA Tools like : - ICC2/ICC – Floor Planning, Placement,Clock Tree Synthesis(CTS), Route, Star RC - RC Extraction . - PrimeTime/Tempus –Static Timing Analysis and Crosstalk Analysis. - Calibre - Physical Verification (DRC/ERC/LVS/ANT) Techinical Skills: - Languages : Basic Shell Scripting, TCL.
Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in Physical Design and EDA tools.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 5 mos
Skills
- Physical Design
- Cmos
- Static Timing Analysis
Career Highlights
- Over 8 years of experience in Physical Design.
- Expertise in Static Timing Analysis and Physical Verification.
- Proficient in EDA tools for ASIC design.
Work Experience
Synopsys Inc
Senior-II (9 mos)
Staff Engineer (9 mos)
Intel Corporation
Design Engineer (2 yrs)
MediaTek
Staff Engineer (4 yrs 3 mos)
Synapse Design Inc.
Physical Design Engineer (2 yrs 5 mos)
Bharat Electronics
Graduate Apprentice Trainee (1 yr)
Education
Master of Technology (M.Tech.) at JNTUH
Bachelor's Degree at Jawaharlal Nehru Technological University
Matriculation at St. Ann's High School