Sushma S — Software Engineer

I’m a Physical Verification and Physical Design Engineer with over 6 years of experience contributing to 20+ successful tapeouts across advanced process nodes, including Samsung (14LPE, 7LPE, 5LPE,2sfe) and TSMC (N4, N3E). My core expertise lies in SoC and block-level PV closure, with a strong foundation in DRC, LVS and PERC. I’ve worked extensively on automotive, 5G modem, and processor designs, supporting complex blocks with high utilization and large instance counts. I’ve also contributed to congestion resolution, and automation efforts that significantly reduced manual verification work. I enjoy collaborating across teams to solve design challenges and ensure high-quality silicon delivery. My focus is always on efficiency, attention to detail, and continuous learning in the fast-evolving semiconductor landscape.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Verification and Design.

Location: Bengaluru, Karnataka, India

Experience: 6 yrs 9 mos