Abhishek Anand

Software Engineer

Bengaluru, Karnataka, India11 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in formal verification across multiple hardware platforms.
Proven track record of identifying deep corner case bugs.
Strong academic foundation from IIT Delhi in Electrical Engineering.

Stackforce AI infers this person is a Formal Verification Engineer with expertise in semiconductor design and verification.

Contact

anand.abhishek2512@yahoo.in LinkedIn

Skills

Core Skills

Formal VerificationElectronics

Other Skills

GPUNetworkingCircuit DesignVerificationVerilogVHDLComputer ArchitectureFPGAMicrosoft ExcelMatlabC++

About

Formal Verification Engineer having rich experience of finding deep corner case bugs and successfully verifying blocks across GPU, CPU and Networking switches. Strong academic background with B. Tech focused in Electrical Engineering from IIT Delhi.

Experience

11 yrs 9 mos

Total Experience

2 yrs 11 mos

Average Tenure

4 yrs 1 mo

Current Experience

Sifive

Principal Formal Verification Engineer

Mar 2022 – Present · 4 yrs 1 mo · Bengaluru, Karnataka, India

Intel corporation

Formal Verification Lead - Barefoot Division (BXD)

Jan 2020 – Mar 2022 · 2 yrs 2 mos · Bengaluru, Karnataka, India

Nvidia

Senior Formal Verification Engineer

Nov 2017 – Dec 2019 · 2 yrs 1 mo · Bengaluru, Karnataka, India

Formal verification of blocks within GPU

Oski technology, inc.

Formal Verification Engineer

Jun 2014 – Nov 2017 · 3 yrs 5 mos · Gurgaon, India

Formal verification of digital designs. Independently worked on Networking and GPU chips.

Konica minolta

Summer Intern

May 2013 – Jul 2013 · 2 mos · Tokyo

Design and Implementation of circuit to aid in verification of a printer head.

Education

Indian Institute of Technology, Delhi

B. Tech — Electrical and Electronics Engineering

Jan 2010 – Jan 2014

Stackforce found 100+ more professionals with Formal Verification & Electronics

Explore similar profiles based on matching skills and experience

Kiran Kumar Reddy

Senior Staff Engineer

at Samsung Semiconductor

Bengaluru, India10 yrs 1 mo exp

Very-Large-Scale Integration (VLSI)Functional Verification

Ayush Hurkat

Sr Solutions Engineer

at Cadence Design Systems

Jamnagar, India5 yrs 3 mos exp

Design VerificationVerification Environments

Shivam Babbar

Lead Software Engineer

at Cadence

Noida, India5 yrs 10 mos exp

Python (Programming Language)PSS/E

Vaibhav Agrawal

Staff Engineer

at Qualcomm

Noida, India11 yrs 5 mos exp

SoC DesignCPUSS Design

Aneesh Kumar

Senior Implementation Engineer

at Arm

Sheffield, United Kingdom9 yrs 2 mos exp

Vrihad Agarwal

Senior ASIC Engineer

at NVIDIA

Bengaluru, India6 yrs 8 mos exp

Computer ArchitectureLogic Design

Ridhi Aggarwal

Coordinator

at Indian Game Theory Society(IGTS), IIT Delhi

Delhi, India2 yrs exp

algorithm design

Suvajit Das

ASIC Engineer Design Verification

at Meta

Bengaluru, India5 yrs 8 mos exp

EthernetAMBA AXI