aditi barman — DevOps Engineer
Experience in Physical Design. 20 Tape outs on 5nm, 7nm , 14nm , 20nm , 28 nm and 14nm and 90nm. Special skills: complete Rtl2GDs , Synthesis & STA , Floorplan, LEC, PnR, MVRC, DRC LVS, IR, ECO
Stackforce AI infers this person is a VLSI Physical Design Engineer with extensive experience in semiconductor design.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 6 mos
Skills
- Physical Design
- Static Timing Analysis
Career Highlights
- 20 Tape outs across multiple technology nodes.
- Expertise in Physical Design and Static Timing Analysis.
- Strong background with leading semiconductor companies.
Work Experience
7Rays Semiconductors India Private Limited
Senior Technical Staff (1 yr 4 mos)
Capgemini Engineering
Manager (2 yrs 1 mo)
AMD
Senior Physical Design Engineer (7 yrs 1 mo)
Sankalp Semiconductor Pvt Ltd
ASIC Physical Design Engineer (1 yr 1 mo)
Infosys
Associate Consultant (7 mos)
Wipro Technologies
physical design engineer (2 yrs 5 mos)
Education
Master of Technology (M.Tech.) at West Bengal University of Technology, Kolkata
M.TECH at TECHNO INDIA SALTLAKE,WBUT
Bachelor's degree at Visvesvaraya Technological University
B.E at M.V.J COLLEGE OF ENGINEERING
ALL INDIA SENIOR SECONDARY CERTIFICATE; 12th at KENDRIYA VIDYALAYA No.1
10th at KENDRIYA VIDYALAYA No.1