Mario Da Costa

Engineering Manager

Bengaluru, Karnataka, India25 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Timing Closure and Physical Design.
Extensive experience in leading engineering teams.
Strong background in synthesis and STA methodologies.

Stackforce AI infers this person is a semiconductor design expert with a focus on physical design and timing analysis.

Contact

Skills

Other Skills

SynthesisSTATiming ClosurePhysical Design

About

Specialties: Synthesis, STA, Timing Closure, Physical Design

Experience

25 yrs 9 mos

Total Experience

6 yrs 6 mos

Average Tenure

7 yrs 9 mos

Current Experience

Intel corporation

2 roles

Engineering Manager

Apr 2021 – Present · 5 yrs

Design Engineer

Jul 2018 – Present · 7 yrs 9 mos

Qualcomm

Staff Engineer

Sep 2012 – Mar 2022 · 9 yrs 6 mos

Open-silicon

Lead Engineer

Feb 2011 – Mar 2022 · 11 yrs 1 mo

Pmc-sierra

Design Engineer

May 2010 – Apr 2011 · 11 mos

Sasken

Lead Engineer Design

Jul 2005 – May 2010 · 4 yrs 10 mos

Primarily involved with STA and timing closure, Physical Design and Synthesis.

Controlnet india pvt ltd

Senior Engineer

Jan 2000 – Jan 2005 · 5 yrs

Education

Goa Engineering College (Goa University)

Bachelor of Engineering; a first — Electronics

Jan 1999 – Present

Government Polytechnic

Diploma — Engineering (Electronics)

Jan 1995 – Present

Goa University

Govt Polytechnic Panaji

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