Sivaneswaran Sankar

Product Engineer

Bengaluru, Karnataka, India11 yrs 8 mos experience

Key Highlights

  • Expert in Power Management IC design and analog circuit development.
  • Published multiple research papers in top IEEE journals.
  • Strong academic background with M.Tech and Ph.D. from IIT Bombay.
Stackforce AI infers this person is a specialized engineer in Power Management IC design within the semiconductor industry.

Contact

Skills

Core Skills

Power Management Ic DesignAnalog Ic Design

Other Skills

LDOBuck converterBoost converterAnalog Circuit DesignPower ManagementLab measurementsAnsys TotemCadence VirtuosoSPICECadence Virtuoso Layout EditorMentor graphics CalibreSynopsys Design CompilerSynopsys IC CompilerUPFPrinted Circuit Board (PCB) Design

About

Currently I started working as a PMIC Analog design engineer at L&T Semiconductor Technologies India. Previously I worked at Samsung SSIR & MediaTek (TW). My area of interest includes Power Management IC design, Energy Harvesting, Analog & Mixed-signal IC design, Low Power VLSI. I completed M.Tech+PhD at IIT Bombay. My thesis titled "Energy Saving Techniques for Energy Constrained CMOS Circuits and Systems" explored various methods of energy saving & energy harvesting for extending the battery life in portable electronic devices. 1. Inductive rectifier for piezo energy harvesting using pre-charge & accumulation (IEEE JSSC, 2022) 2. Switched-capacitor assisted power gating for leakage reduction in digital circuits (IEEE TCAS-1, 2020) 3. NEMS discrete-time amplifier for IQ reduction in Analog Front End (IEEE TED, 2018) 4. Impact on energy reduction in SoC using NEMS power gating (IEEE TED, 2017) Link to my Google scholar page: https://scholar.google.co.in/citations?user=t4NjCnoAAAAJ&hl=en

Experience

11 yrs 8 mos
Total Experience
2 yrs 8 mos
Average Tenure
1 yr 3 mos
Current Experience

L&t semiconductor technologies

Senior Engineer (Analog PMIC)

Feb 2025Present · 1 yr 3 mos · Bengaluru, Karnataka, India

Samsung semiconductor

Staff Engineer

Oct 2022Feb 2025 · 2 yrs 4 mos · Bengaluru, Karnataka, India

  • I worked as a Power Management IC Design Engineer (LDO, Buck, Boost converter)
Power Management IC DesignLDOBuck converterBoost converterPower Management IC designAnalog IC design

Mediatek

Senior Design Engineer

Sep 2021Sep 2022 · 1 yr · Hsinchu City, Taiwan

  • I worked as a Power Management IC Design Engineer
Analog Circuit DesignPower ManagementPower Management IC designAnalog IC design

National chiao tung university

Visiting Researcher

Jun 2019Dec 2019 · 6 mos · Hsinchu City, Taiwan, Taiwan

Indian institute of technology, bombay

Mtech+PhD

Jul 2014Aug 2021 · 7 yrs 1 mo · Mumbai, Maharashtra, India.

Education

Indian Institute of Technology, Bombay

M.Tech + Ph.D — Microelectronics & VLSI

Jul 2014Aug 2021

Madras Institute of Technology

Bachelor's degree — Electronics and Communication Engineering

Jan 2008Jan 2012

Stackforce found 12 more professionals with Power Management Ic Design & Analog Ic Design

Explore similar profiles based on matching skills and experience