Sep 2021 – Dec 2024 · 3 yrs 3 mos

Mar 2019 – Aug 2021 · 2 yrs 5 mos

Sep 2015 – Mar 2019 · 3 yrs 6 mos

Jun 2014 – Sep 2015 · 1 yr 3 mos

• Working on wearable SoC based FF boards.

Jun 2010 – Sep 2015 · 5 yrs 3 mos

• Worked on a virtualization based SoC architecture for convertible systems (Laptop <-> Tablet). Was primarily responsible for overall SoC architecture and device level virtualization solutions. Also Managed subsystem design and verification efforts for generic virtualization and System boot. Worked on multiple system issues and was instrumental in solving them.
• Idea generation for different platforms including initial architecture for enterprise IO virtualization SoC.
• Architecting Industry 1st Wearable Processing Unit family which is one of its kind ultra low power SoC (2 generations) designed exclusively for wearables & IOT. Contributed for SoC feature definition, Low power features, Power estimates, Performance analysis, validation support, SoC Bring up, SW support, Customer interactions, development boards etc..
• Patent filings (PCT & US)
• WIPO list: http://www.highbeam.com/Search?searchTerm=VOLETI+Siva+Raghuram

Aug 2009 – May 2010 · 9 mos

• Managed design activity for Fusion Project. Contributed for architectural exploration.

Jan 2006 – Aug 2009 · 3 yrs 7 mos

• Worked on architecture for mobile multimedia processor SoCs. Interacted with customers on various issues during product definition & execution phases. Driven the specification and project execution in line with the requirements agreed upon by the customer, marketing and s/w teams being in Architect role.
• Worked on chip integration and sub system architecture design/definition in various projects.

Jan 2004 – Jan 2006 · 2 yrs

• SoC integration lead for mobile TV (DVB-H) coprocessors. Verification lead for mobile multimedia coprocessor chips. Worked on different system blocks specification, design & verification during this tenure. Involved in Synthesis support, Chip bringup and back end interfacing.
• Also worked on IPs like Huffman Decoder, Dequantizer etc..

Jan 2001 – Jan 2004 · 3 yrs

• I am proud to be one among a team of 3 VLSI engineers who have taped out a chip successfully which was functional completely in the 1st go. Be it Architecture/DesignSpecification, RTL development, verification, FPGA, synthesis, DFT, STA, physical design interface and complete documentation at all phases in all tasks, we have done quite well both as individuals and as a team and thats a major factor for the success of the chip. Above all this VOIP + MP3 player chip formed our basic platform for our exciting career.
• Apart from this major acheivement, I have been part of different IP development activities, FPGA based platform developments etc.. Other work includes scripting for configurability and code extraction for different IPs.