Rahul Patel — Co-Founder
Pursuing Mtech from Nit kurukshetra in Vlsi Design. And Worked as Emulation Engineer with 1.3 years of experience having knowledge on System Verilog, Zebu emulators and basic idea of Synopsis Verdi, Synopsis vcs & ncsim.
Stackforce AI infers this person is a VLSI Design Engineer with a focus on Hardware Emulation and Verification.
Location: Khargone, Madhya Pradesh, India
Experience: 9 mos
Skills
- Hardware Emulation
- Very-large-scale Integration (vlsi)
Career Highlights
- M.Tech candidate specializing in VLSI Design.
- 1.3 years of experience as an Emulation Engineer.
- Proficient in System Verilog and Hardware Emulation.
Work Experience
AMD
Co-op DFT intern (6 mos)
Tech Mahindra Cerium Pvt Ltd
Design Verification Engineer (9 mos)
Associate Engineer (6 mos)
Education
M.tech at National Institute of Technology, Kurukshetra, Haryana
Bachelor of Engineering - BE at Institute of Engineering & Technology DAVV, Indore
