Indresh yadav

DevOps Engineer

Ahmedabad, Gujarat, India13 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 12 years of experience in design verification.
  • Specialized in UVM-based verification methodologies.
  • Led a team of 12 engineers at Boeing.
Stackforce AI infers this person is a Design Verification Engineer specializing in Aerospace and Hardware Verification.

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Skills

Core Skills

UvmDesign Verification

Other Skills

AMBA AHBASICAXIApplication-Specific Integrated Circuits (ASIC)Assertion Based VerificationCC++DebuggingEthernetFormal VerificationFunctional VerificationHardware EmulationIntegration of VIPsLinuxMentoring

About

I am Indresh Yadav, and I bring 12 years of experience in design verification, with a specialization in UVM-based verification methodologies. Over the years, I have worked on IP and subsystem verification across diverse domains, including avionics, security modules, and network-on-chip systems. I have hands-on experience in various areas, including project planning, translating requirements into verification test plans, bringing up UVM testbenches from scratch, implementing constrained random and metrics-driven verification, assertion-based verification, formal verification, emulation enablement, GLS verification, and functional/code coverage analysis and closure. My expertise spans protocols like AXI4, SPI, Ethernet, PCIe, and DDR4/LPDDR4, as well as scripting languages such as Python, Perl, and Shell. I have also had the privilege of mentoring junior engineers and helping them develop their skill sets. Currently, I am working as a Lead Design Verification Engineer at Boeing, where I lead a team of 12 engineers. I have contributed to key projects like the Boeing Autonomous System Computer (BASC) and Vehicle Management System Computer (VMSC). My responsibilities include project planning, developing UVM-based testbenches, integrating VIPs for protocols such as AXI4, PCIe, and Ethernet, and mentoring team members. I am passionate about verification and ensuring robust, high-quality designs through efficient verification strategies. I look forward to discussing how my experience can contribute to your team.

Experience

Boeing

Lead Design Verification Engineer

Aug 2021Present · 4 yrs 7 mos · Bangalore Urban, Karnataka, India

UVMProject PlanningVerification Test PlansUVM TestbenchesIntegration of VIPsMentoring+1

Svntl asia pacific pte

Sr Team Lead

Mar 2020Jul 2021 · 1 yr 4 mos · Singapore, Singapore

Ants global (pvt) ltd.

Team Lead

Feb 2017Feb 2020 · 3 yrs · Ahmedabad, Gujarat, India

Cerium systems

Sr Verification Engineer

Aug 2016Feb 2017 · 6 mos · Bangalore Urban, Karnataka, India

Einfochips

2 roles

Sr ASIC Engineer

Nov 2013Aug 2016 · 2 yrs 9 mos · Ahmedabad Area, India

ASIC Trainee Engineer

May 2013Nov 2013 · 6 mos · Ahmedabad Area, India

Eitra(einfochip training and research academy)

Trainee

Sep 2012Apr 2013 · 7 mos · Ahmedabad Area, India

  • ASIC Verification:
  • 1. Work on different Tools for Verification.
  • 2. Work on APB Verification environment project.

Ipr(institute for plasma research)

Project Trainee

Jan 2011Apr 2011 · 3 mos

  • Internship of 4 Months:
  • Concepts of Microwave
  • Design Multi hole coupler and single hole coupler for 42.5 GHz "gyrotron".

Education

L.C. Institute of Technology

Bachelor of Engineering (B.E.) — Electronics and Communications Engineering

Jan 2007Jan 2011

RHHS

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