Revanth Ramayanapu

Software Engineer

Bengaluru, Karnataka, India7 yrs 2 mos experience

Key Highlights

  • Senior Lead Engineer with extensive experience in Physical Design.
  • Proficient in Low-power Design and EDA tools.
  • Strong background in Floorplanning and Cadence Encounter.
Stackforce AI infers this person is a highly skilled engineer in the semiconductor design industry.

Contact

Skills

Core Skills

Physical DesignLow-power Design

Other Skills

Cadence EncounterFloorplanningTCLSynopsys toolsEDA

Experience

7 yrs 2 mos
Total Experience
2 yrs 4 mos
Average Tenure
1 mo
Current Experience

Qualcomm

Senior Lead Engineer

Apr 2026Present · 1 mo

Physical DesignCadence EncounterLow-power DesignFloorplanningTCLSynopsys tools+1

Accenture

Silicon Engineer Specialist

Feb 2025Mar 2026 · 1 yr 1 mo · Bengaluru · On-site

FloorplanningLow-power DesignPhysical DesignSynopsys toolsTCLCadence Encounter+1

Cisco

Lead Engineer

Sep 2024Mar 2026 · 1 yr 6 mos · Bengaluru · Hybrid

Cientra

2 roles

Lead Physical Design Engineer

Promoted

Jun 2024Jan 2025 · 7 mos · Bengaluru, Karnataka, India

Senior Physical Design Engineer

May 2022Jun 2024 · 2 yrs 1 mo · Bengaluru, Karnataka, India

Physical Design

Qualcomm

Senior Physical Design Engineer

May 2022Sep 2024 · 2 yrs 4 mos · Bengaluru, Karnataka, India · On-site

Nvidia

ASIC Physical Design Engineer

Feb 2021Apr 2022 · 1 yr 2 mos · Bengaluru, Karnataka, India · Hybrid

Intel corporation

Physical Design Engineer

Jul 2019Feb 2021 · 1 yr 7 mos · Bengaluru, Karnataka, India · On-site

Chipontime technologies pvt ltd

Senior Physical Design Engineer

Jan 2019May 2022 · 3 yrs 4 mos · India

Education

Mother theresa institute of engineering and technology

Bachelor of Technology - BTech — Electronic and Communication Engineering

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