Sanjith Sleeba, PMP — Director of Engineering
Design-for-Test professional with work experience on technologies from 130-28nm of ASIC/SOC's. Worked on all aspects of DFT Insertion and verification on a few thousand to multi-billion transistor designs. Currently guiding and managing a team on MBIST methodology/verification and bring up tasks. Specialties: Scan Insertion, ATPG , MBIST, Boundary scan, IO-BIST, DFT timing and ATE bringup are some of key skills. Have worked on both Synopsys and Mentor Grpahics DFT tools.
Stackforce AI infers this person is a DFT expert in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 21 yrs
Skills
- Dft
- Project Management
Career Highlights
- Expert in DFT methodologies and verification.
- Led teams on complex ASIC/SOC designs.
- Extensive experience with Synopsys and Mentor Graphics tools.
Work Experience
Qualcomm
Director of Engineering (2 mos)
NVIDIA
Senior Engineering Manager (12 yrs 1 mo)
Senior DFT Engineer (5 yrs 2 mos)
Mindtree Pvt. Ltd.
DFT Engineer (3 yrs 9 mos)
Education
at National Institute of Technology, Tiruchirappalli
