Hari Patel

Co-Founder

Ahmedabad, Gujarat, India19 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Co-founded a successful VLSI design company.
  • Expert in avionics compliance standards DO-254 and DO-178.
  • Led teams across multiple countries in semiconductor projects.
Stackforce AI infers this person is a Semiconductor and Avionics expert with extensive VLSI design and verification experience.

Contact

Skills

Core Skills

VlsiVerification And Validation (v&v)Analog Circuit DesignAsic Verification

Other Skills

DO-254DO-178AvionicsSystem on a Chip (SoC)Embedded SystemsRTL DesignPhysical DesignVerilogFunctional VerificationNCSimSystemVerilogOpen Verification MethodologyPerlDebuggingUVM

About

Co-Founded Alpha-Numero after spending 10+ years in various semiconductor companies. Build a niche engineering company from zero to 200+, including teams in the US, Germany, Canada, and India. How can we as a company grow in terms of technology and business operations? That's my daily challenge to work. I believe in Value creation through collaboration and influencing within the industry, leveraging networking as well as strong customer relationships. Alpha-Numero is a VLSI Design and verification services company focusing in the areas of Design and verification, Physical design, FPGA/ASIC/SoC verification, RTL, Analog Circuit Design, AMS, and embedded hardware and software and systems including firmware verification. Alpha-numero possesses world class capability in providing expert solutions regarding safety critical avionics system. We are specialist in DO-254/178B/C DAL A to DAL E level. We work in Design development and verification & validation for avionics hardware and software in compliance with DO-254 and DO-178B/C standards respectively. Alpha-Numero is among 10 Most Promising Semiconductor Companies – 2022 by SiliconIndia. Our Vision: To be a customer-centric organization offering innovative solutions in the niche technology areas, while focusing on achieving excellence.

Experience

19 yrs 2 mos
Total Experience
3 yrs 9 mos
Average Tenure
10 yrs
Current Experience

Alpha numero (ants global systems pvt ltd)

Co-Founder and EVP

Jun 2016Present · 9 yrs 11 mos · Ahmedabad, Gujarat, India · On-site

DO-254DO-178AvionicsSystem on a Chip (SoC)Embedded SystemsVerification and Validation (V&V)+21

Einfochips (an arrow company)

Technical Lead

Feb 2012Jun 2016 · 4 yrs 4 mos · Ahmedabad Area, India

Amd

IP (AMS) verification engineer

Feb 2011Jan 2012 · 11 mos

  • Worked on...
  • . 28 SHP
  • . Analog Mix simulation (AMS)
  • . Tools : XA (AMS simulator), Verdi (Waveform viewer and debugger), VCS 2010.06-SP1
  • . Spice and gate-level simulation
  • . SystemVerilog, extensively worked on assertions and functional coverage
Analog Mix simulation (AMS)XA (AMS simulator)Verdi (Waveform viewer and debugger)VCSSystemVerilogAssertions+3

Lsi corporation

Verification Engineer II

Sep 2009Dec 2010 · 1 yr 3 mos

  • > Worked on HDDC (Hard Disk Drive Controller) verification.
  • > Significantly in the first 40-nm ASSP (Application Specific Standard Product) developed by LSI R&D for the HDDC
  • > Worked on the two major and important IPs, ‘SERVO motor controller’ and ‘DF (Disk Formatter)’, of the HDDC.
  • > Recognized with DFT award.
HDDC verification40-nm ASSP developmentSERVO motor controllerDisk FormatterVerification and Validation (V&V)

E-infochips

ASIC Verification Engineer

Jan 2007Sep 2009 · 2 yrs 8 mos

  • Bluetooth (BT)
  • Contributed on development of blue-tooth monitor and played major role on designing BT VIP model in SV OVM
  • Image Sensor
  • Worked on MIPI and SMIA mobile interface protocols and developed VE for the same.
Bluetooth monitor developmentBT VIP model designMIPI mobile interface protocolsSMIA mobile interface protocolsASIC Verification

Education

Nirma University

B.Tech — Electronics & Communication

Jan 2003Jan 2007

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