S

Sadhana Sundar

Software Engineer

Dripping Springs, Texas, United States11 yrs 10 mos experience
Highly Stable

Key Highlights

  • Master's degree in Electrical Engineering from ASU
  • Extensive experience in System-on-Chip design
  • Proficient in multiple programming languages and design tools
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and System-on-Chip technologies.

Contact

LinkedIn

Skills

Core Skills

System VerilogNetworking

Other Skills

Bluespec System VerilogARM AMBA APBARM AMBA AHBVisual C#Networking Tool DevelopmentVLSICadencePspiceUnixModelSimXilinxVerilogCC++Programming

About

Experienced System-on-Chip Design Engineer with a demonstrated history of working in the semiconductors industry. Strong engineering professional with a Master's degree focused in Electrical Engineering from Arizona State University.

Experience

11 yrs 10 mos
Total Experience
2 yrs 10 mos
Average Tenure
9 mos
Current Experience

Amd

Design Engineer

Aug 2025 – Present · 9 mos

Ericsson telecommunications inc.

IP Design Engineer

Apr 2022 – Aug 2025 · 3 yrs 4 mos · Austin, Texas, United States

Intel corporation

Component Design Engineer

Jul 2015 – Mar 2022 · 6 yrs 8 mos · Fort Collins, Colorado, United States

Analog rails

Intern

Jan 2015 – Mar 2015 · 2 mos

Indian institute of technology, madras

Summer Intern

May 2014 – Aug 2014 · 3 mos

  • Designed basic combinational and sequential circuits using Bluespec System Verilog.
  • Acquired skill in the working and source code of ARM AMBA APB and AHB in System Verilog.
Bluespec System VerilogARM AMBA APBARM AMBA AHBSystem Verilog

Arizona state university

Back Office Worker

Apr 2014 – May 2015 · 1 yr 1 mo

Universiti sains malaysia

UndergraduateTechnical Intern

Jan 2013 – Mar 2013 · 2 mos · Penang, Malaysia

  • Designed, developed and modified networking tool, IPERF.
  • Implemented user interface for IPERF, a module, to help NLTVC monitor network traffic and the bandwidth usage by the server, using Visual C#.
  • Worked on videoconferencing based on the VISCA protocol to create a specialized high definition
  • videoconferencing application.
Visual C#Networking Tool DevelopmentNetworking

Education

Arizona State University

Master's degree — Electrical Engineering

Jan 2013 – Jan 2015

Meenakshi Sundararajan Engineering College

Bachelor of Engineering (BEng)

Jan 2009 – Jan 2013

P S Senior Secondary School

Computer Science

Jan 1995 – Jan 2008

Stackforce found 100+ more professionals with System Verilog & Networking

Explore similar profiles based on matching skills and experience

Debraj Dutta

Debraj Dutta

Sr TPU Verification Engineer

at Google

India9 yrs 10 mos exp
Machine LearningCompilersSoftware Development
Trisha Ghosh

Trisha Ghosh

Design Verification Engineer

at Qualcomm

College Station, United States10 yrs 2 mos exp
Design VerificationFunctional VerificationLeadershipUniversal Verification Methodology (UVM)
Rajkumar Satkuri

Rajkumar Satkuri

IP Logic Design Engineer

at Intel Corporation

Bengaluru, India17 yrs 9 mos exp
Application-Specific Integrated Circuits (ASIC)Digital Design
Nilesh Pathrabe

Nilesh Pathrabe

Accumulated Expertise

at Career-Wide Experience

Nagpur, India0 mo exp
PR

Praneeth Reddy

Design Verification Engineer

at Rambus

Portland, United States3 yrs exp
Functional VerificationIP Verification
Mohammad Ahmad Mohdi

Mohammad Ahmad Mohdi

Full Stack Developer

at American Express

Gurgaon, India14 yrs 9 mos exp
JavaWeb DevelopmentC++EDAVideo Software Development
Spurthi Bhaskar

Spurthi Bhaskar

SOC DESIGN VERIFICATION ENGINEER

at Intel Corporation

Bengaluru, India9 yrs 3 mos exp
ASICVLSI
Suhas Meda

Suhas Meda

Staff Engineer

at MediaTek

Bengaluru, India7 yrs 1 mo exp
Universal Verification Methodology (UVM)Very-Large-Scale Integration (VLSI)