Suhas Meda

Software Engineer

Bengaluru, Karnataka, India7 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Universal Verification Methodology and VLSI.
  • Strong leadership and management skills in engineering.
  • Proficient in multiple programming languages and tools.
Stackforce AI infers this person is a VLSI and verification expert in the semiconductor industry.

Contact

suhasvmeda@gmail.comLinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)Very-large-scale Integration (vlsi)

Other Skills

system verilogVerilogDigital ElectronicsLeadershipManagementMicrosoft WordMicrosoft PowerPointC (Programming Language)C++Linuxsystem verilog assertionsxlinx iserivieraproFront-end DesignSystem on a Chip (SoC)

Experience

7 yrs
Total Experience
3 yrs 6 mos
Average Tenure
6 yrs 7 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Promoted

Jul 2025 – Present · 9 mos · Bengaluru, Karnataka, India

Universal Verification Methodology (UVM)system verilogVerilogVery-Large-Scale Integration (VLSI)Digital ElectronicsLeadership+1

Senior Verification Engineer

Promoted

Jul 2022 – Jun 2025 · 2 yrs 11 mos · Bengaluru, Karnataka, India

Universal Verification Methodology (UVM)system verilogVerilogVery-Large-Scale Integration (VLSI)Digital Electronics

Verification Engineer

Aug 2019 – Jul 2022 · 2 yrs 11 mos · Bengaluru, Karnataka, India

Universal Verification Methodology (UVM)system verilogVerilogVery-Large-Scale Integration (VLSI)

Si2chip technologies pvt. ltd.

Design and verification

Jun 2019 – Jul 2019 · 1 mo

Maven silicon

2 roles

VLSI design and verification

Feb 2019 – May 2019 · 3 mos · Bengaluru, Karnataka, India

VLSI - design and verification trainee

Aug 2018 – Jan 2019 · 5 mos · Bengaluru, Karnataka, India

Education

RNS Institute of Technology - India

Bachelor of Engineering - BE — Electronics and instrumentation

Aug 2014 – May 2018

Jawahar navodaya vidyalaya, Tumkur

Jan 2008 – Jan 2014

Stackforce found 100+ more professionals with Universal Verification Methodology (uvm) & Very-large-scale Integration (vlsi)

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