Reddy Sreekanth

Software Engineer

Bengaluru, Karnataka, India9 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Physical Design and Static Timing Analysis.
  • Proven experience in ASIC and semiconductor design.
  • Strong background in Linux and RTL design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC development and physical design methodologies.

Contact

LinkedIn

Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

IREM flow implicationsApplication-Specific Integrated Circuits (ASIC)SemiconductorsLinuxCFloor PlansRTL DesignSPICESynopsys Primetime

Experience

9 yrs 7 mos
Total Experience
3 yrs 2 mos
Average Tenure
4 yrs 7 mos
Current Experience

Amd

2 roles

Member of Technical Staff

Jul 2025 – Present · 10 mos

Sr.Silicon Design Engineer

Oct 2021 – Jul 2025 · 3 yrs 9 mos

Intel corporation

SoC Design Engineer

Sep 2020 – Oct 2021 · 1 yr 1 mo · Bangalore Urban, Karnataka, India

Laksh semiconductors

Physical Design Engineer

Oct 2016 – Sep 2020 · 3 yrs 11 mos

  • worked on multiple projects, PD, STA, IR,EM flow implications
Physical DesignStatic Timing AnalysisIREM flow implications

Education

Pondicherry University

Master’s Degree

Jan 2014 – Jan 2016

Pulla Reddy Institute of Technology

B.Tech — ECE

Jan 2009 – Jan 2013

lsvn medchal

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