Naga Lingeswara Rao Pannem

CEO

Bengaluru, Karnataka, India13 yrs 1 mo experience

Key Highlights

  • Experienced in SoC level verification and validation.
  • Strong background in digital designs and test planning.
  • Proven leadership as a Technical Manager.
Stackforce AI infers this person is a VLSI Design and Verification Specialist.

Contact

LinkedIn

Skills

Core Skills

Digital DesignsTest Planning

Other Skills

Interpersonal CommunicationAMBA AHBDebuggingSoC level VerificationFunctional verFunctional VerificationUnix Shell Scripting & Perl ScriptingSoC level verification

Experience

13 yrs 1 mo
Total Experience
3 yrs 1 mo
Average Tenure
5 mos
Current Experience

Acl digital

2 roles

Technical Manager

Promoted

Dec 2025 – Present · 5 mos · Bengaluru, Karnataka, India · Hybrid

Senior Software Engineer Team Lead

Sep 2021 – Nov 2025 · 4 yrs 2 mos · Bengaluru, Karnataka, India · Hybrid

Amd

Contractor

Jul 2023 – Jul 2025 · 2 yrs · Bengaluru, Karnataka, India · Hybrid

Axiado corporation

Contractor

Sep 2021 – Mar 2023 · 1 yr 6 mos · Bengaluru, Karnataka, India · Remote

Intel corporation

2 roles

Pre-Silicon Verification Engineer

Jun 2017 – Sep 2021 · 4 yrs 3 mos · Bengaluru Area, India

  • Working as a Validation Engineer for verification of certain IPs at SS level.
Digital DesignsInterpersonal CommunicationTest PlanningAMBA AHBDebugging

Internship

Jul 2016 – Jun 2017 · 11 mos · Bengaluru Area, India

  • Working on verification of scalable low power engine.
Digital DesignsInterpersonal CommunicationDebugging

Wipro technologies

2 roles

Project Engineer

Jul 2010 – May 2013 · 2 yrs 10 mos

  • Working on ASIC verification using C-based verification
Digital DesignsInterpersonal CommunicationTest PlanningDebugging

Project Engineer

Jul 2010 – May 2013 · 2 yrs 10 mos

  • I worked as a Verification Engineer at SoC level. I have experience in working on creating the verification set-up and worked on verifying a few IPs like DMTimer, WDT, SPI, U(S)ART, USIM & QSPI at Soc Level. I worked on C-based Verification.
Digital DesignsInterpersonal CommunicationTest PlanningDebugging

Texas instruments

4 roles

From Wipro

Jan 2010 – Jan 2013 · 3 yrs

Digital DesignsInterpersonal CommunicationTest PlanningDebugging

Verification Engineer

Jan 2010 – Jan 2013 · 3 yrs

Digital DesignsInterpersonal CommunicationTest PlanningDebugging

From Wipro

Jan 2010 – Jan 2013 · 3 yrs

Digital DesignsInterpersonal CommunicationTest PlanningDebugging

From Wipro

Jan 2010 – Jan 2013 · 3 yrs

Digital DesignsInterpersonal CommunicationTest PlanningDebugging

Education

National Institute of Technology Surat

Master’s Degree — VLSI Design and Embedded Systems

Jan 2015 – Jan 2017

Gitam

Bachelors of Engineering — Electronics & Communications Engineering

Jan 2006 – Jan 2010

B.V. & B.N. High School, Jandrapet

Secondary School certificate

Jan 1999 – Jan 2004

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