Jatan Gaur — Software Engineer
Experienced professional with 4 years in VLSI Front-End Pre-Si SoC Design Verification. Skilled in Test Plan development and industry-standard languages including System Verilog and Verilog for testcase development. Proficient in utilizing industry-standard debug tools.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in semiconductor technology.
Location: Noida, Uttar Pradesh, India
Experience: 7 yrs 6 mos
Skills
- Design Verification
- Debugging
Career Highlights
- 4 years of experience in VLSI Front-End Pre-Si SoC Design Verification.
- Proficient in System Verilog and Verilog for testcase development.
- Skilled in Test Plan development and industry-standard debug tools.
Work Experience
Synopsys Inc
Staff Design Verification Engineer (1 yr 2 mos)
Intel Corporation
SoC Design Verification Engineer (4 yrs 6 mos)
Indian Institute of Technology (Banaras Hindu University), Varanasi
Training and Placement Representative (1 yr)
Teaching Assistant (1 yr 10 mos)
Oil and Natural Gas Corporation Ltd
Summer Trainee (1 mo)
Education
Master of Technology - MTech at Indian Institute of Technology (Banaras Hindu University), Varanasi
Bachelor of Technology - BTech at National Institute of Technology Delhi
