Bharath kumar Dannana — Product Engineer
I graduated from Rajiv Gandhi university of knowledge technologies(IIIT SRIKAKULAM) in the stream of Electronics and communication engineering. I qualified GATE-2022 in Electronics and communication engineering . Built solid VLSI and verification skills as an Advanced Design Verification Trainee at Maven Silicon. I have over 2.5 years of experience in verification of complex IPs. I have successfully executed end-to-end verification for several IPs, which are part of automotive projects, achieving 100% functional coverage. I am skilled in SystemVerilog, UVM, and proficient in building reusable testbenches, developing verification scenarios, assertions, and functional coverage.
Stackforce AI infers this person is a Verification Engineer specializing in VLSI and automotive projects.
Location: Vijayawada, Andhra Pradesh, India
Experience: 3 yrs 4 mos
Skills
- Functional Verification
- Systemverilog
- Rtl Design
Career Highlights
- Over 2.5 years of experience in IP verification.
- Achieved 100% functional coverage in automotive projects.
- Skilled in SystemVerilog and UVM for complex designs.
Work Experience
MediaTek
Verification Engineer (2 yrs 10 mos)
Infosys Limited
System Engineer (6 mos)
System engineer trainee (4 mos)
Maven Silicon
Advanced VLSI Design and verification Trainee (11 mos)
Education
Bachelor of Technology - BTech at RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, SRIKAKULAM
Python at NxtWave
Pre university course (PUC) at RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, SRIKAKULAM
SSC (10th class) at A.K.T.P.M.C.High School
