Ravi Teja Poosarla — Software Engineer
Working as a Senior Silicon Design Engineer in AMD Server DFT RTL Team. I handle SSN, In System ATPG and other DFXIP Integrations. Also working on SMS Insertion, Spyglass, Lint and CDC checks for DFT. From 2019 to 2021, I was in MediaTek as a RTL Design Intern in 5G Uplink Modem Design Team. Worked on design 5G Modem Blocks such as ZC Sequence and Scrambler for an year. Later moved to DFT team where my tasks include TMBIST Implementation and Verification. MTech in VLSI and Embedded Systems from RV College of Engineering (2018-2019)
Stackforce AI infers this person is a Senior Silicon Design Engineer specializing in telecommunications and digital IC design.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 1 mo
Skills
- Dft
- Digital Ic Design
- Rtl Design
Career Highlights
- Expert in DFT and RTL Design for silicon engineering.
- Hands-on experience with 5G modem design and verification.
- Proficient in multiple programming languages for design automation.
Work Experience
AMD
Senior Silicon Design Engineer (2 yrs 6 mos)
Silicon Design Engineer (2 yrs 5 mos)
MediaTek
Design Engineer (1 yr)
Intern (1 yr)
Tata Consultancy Services
Systems Engineer (4 yrs 2 mos)
Education
Master of Technology - MTech at RV College Of Engineering
Bachelor of Technology - BTech at GITAM Deemed University