Vishnuvardhan Golla — Software Engineer
Good Skils set of System Verilog and UVM methodology , SOC level verification and Debugging
Stackforce AI infers this person is a VLSI Verification Engineer with expertise in SOC design and verification methodologies.
Location: Hyderabad, Telangana, India
Experience: 12 yrs 1 mo
Skills
- System Verilog
- Uvm
- Logic Design
- Verification
Career Highlights
- Expert in System Verilog and UVM methodology.
- Proficient in SOC level verification and debugging.
- Strong background in RTL design and verification.
Work Experience
Silicon Labs
Associate Staff Engineer (2 yrs 1 mo)
Lead Engineer (11 mos)
Senior Engineer (1 yr 7 mos)
AMD
Senior Silicon Design Engineer (3 yrs 11 mos)
Redpine Signals
Design Verification Engineer (3 yrs 1 mo)
RV-VLSI Design Center
Trainee (6 mos)
Education
Trainee at RV VLSI Design Center
Bachelor of Technology (BTech) at Rajeev Gandhi Memorial College of Engineering and Technology
Diploma at Govt institute of Electronics
Inter 1st year at Basi Reddy Memorial College
SSC at Sri Navanandhi High School