SAURABH KUMAR

Software Engineer

Noida, Uttar Pradesh, India7 yrs 10 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in power integrity and signoff analysis.
Proficient in VLSI backend design and physical design tools.
Strong background in LED design and optimization using graphene.

Stackforce AI infers this person is a Semiconductor and VLSI expert with a focus on power integrity and physical design.

Contact

Skills

Core Skills

Power IntegrityStatic AnalysisPhysical DesignLed Design

Other Skills

PDNIR Drop SignoffIR SIGNOFFCPMRDL RoutingBUMP ANALYSISPAD ANALYSISDynamic AnalysisDFT vector based IR analysisCadence EncounterSTASynthesisSimuLEDGrapheneREDHAWK-SC

About

Presently Working on PDN, Reliability Verification, IR Drop Signoff Analysis using RHSC/PFSC//Redhawk Tool in 2nm,3nm,4nm,5nm FinFET, 12nm FinFET ,16nm ,22 FDSOI technology ,full chip and block level Analysis,CPM Analysis, full chip power nets planning,Bump planning worked in CoDesign( RDL) , Experienced in Floor planning , PnR in 90nm technology.

Experience

7 yrs 10 mos

Total Experience

3 yrs 11 mos

Average Tenure

4 yrs 10 mos

Current Experience

Qualcomm

2 roles

Senior Lead Engineer

Promoted

Nov 2025 – Present · 6 mos · On-site

Senior Engineer

Jul 2021 – Nov 2025 · 4 yrs 4 mos · On-site

PDN SIGNOFF

Mediatek

Power Integrity Engineer

Jun 2018 – Jun 2021 · 3 yrs · Bangalore Urban, Karnataka, India · Hybrid

Contract through Synapse Design
PDN
IR SIGNOFF
CPM
RDL Routing
BUMP ANALYSIS FOR FCCSP
PAD ANALYSIS FOR QFN
Early stage static Analysis
Static Analysis
Vectorless/vector based Dynamic Analysis
DFT vector based IR analysis: MBIST, SCAN, OCC

PDNIR SIGNOFFCPMRDL RoutingBUMP ANALYSISPAD ANALYSIS+4

Pine training academy

Trainee

Dec 2017 – May 2018 · 5 mos · Gaziabaad

Trained in VLSI Backend Design(Physical Design). Here I had learnt PnR flow on industry standard cadence Encounter tool. Learnt Basic concept of STA and synthesis.

Csir-ceeri

Research Internship

Jan 2017 – Jun 2017 · 5 mos · Pilani, Rajasthan

I have done M.Tech dissertation in the Design & Optimization of Blue LEDs using Graphene.In this project I have used the simulation software SimuLED. During this time I also learnt the fabrication of LED and it's packaging .