Vinoth Babu

Director of Engineering

Bengaluru, Karnataka, India27 yrs 2 mos experience
Highly Stable

Key Highlights

  • 20+ years in physical design leadership.
  • Expert in SOC solutions for Apple products.
  • Strong collaboration with cross-functional teams.
Stackforce AI infers this person is a leader in semiconductor design and engineering.

Contact

Skills

Core Skills

Physical DesignLow Power Design

Other Skills

CPFHigh Speed DesignUnified Power Format (UPF)CPU designHigh Performance Computing (HPC)Problem SolvingClock Tree SynthesisPhysical VerificationEDAStatic Timing AnalysisPrimetimeTiming ClosureTCLASICParasitic Extraction

About

With over 20 years of experience in physical design, I am a passionate and driven leader who oversees the SOC physical design management at Apple. I work with a talented and diverse team of engineers to deliver high-performance, low-power, and reliable SOC solutions for various Apple products. I have extensive knowledge and skills in clock tree synthesis, low power design, and physical verification, which I acquired and honed through my previous roles at Synopsys and Juniper Networks. I enjoy collaborating with cross-functional teams and partners to solve complex design challenges and optimize the SOC design flow. My mission is to create innovative and cutting-edge physical design technologies that enhance the user experience and satisfaction of Apple customers.

Experience

27 yrs 2 mos
Total Experience
5 yrs 2 mos
Average Tenure
1 yr
Current Experience

Qualcomm

Director of Engineering

May 2025Present · 1 yr · Bengaluru, Karnataka, India · On-site

Apple

SOC Physical Design Management

Jan 2023May 2025 · 2 yrs 4 mos · Sunnyvale, California, United States · Hybrid

CPFHigh Speed DesignUnified Power Format (UPF)CPU designHigh Performance Computing (HPC)Problem Solving+2

Synopsys inc.

4 roles

R&D Engineer Principal

Jul 2017Jan 2023 · 5 yrs 6 mos · Bengaluru, Karnataka, India · Hybrid

CPFHigh Speed DesignUnified Power Format (UPF)CPU designHigh Performance Computing (HPC)Problem Solving+2

Sr. Staff Applications Consultant

Aug 2005Jun 2011 · 5 yrs 10 mos · On-site

CPFHigh Speed DesignUnified Power Format (UPF)CPU designProblem SolvingPhysical Design+1

Sr. Applications Consultant

Promoted

Oct 2002Aug 2005 · 2 yrs 10 mos · On-site

High Speed DesignUnified Power Format (UPF)CPU designProblem SolvingPhysical DesignLow Power Design

Corporate Applications Engineer

Jul 2000Oct 2002 · 2 yrs 3 mos · On-site

Problem Solving

Juniper networks india

ASIC Sr. Manager

Jun 2011Jul 2017 · 6 yrs 1 mo · Bengaluru, Karnataka, India · On-site

CPFHigh Speed DesignUnified Power Format (UPF)CPU designHigh Performance Computing (HPC)Problem Solving+2

Byt digital

Design Engineer

Mar 1999Jul 2000 · 1 yr 4 mos · Chennai, Tamil Nadu, India · On-site

Problem Solving

Education

Velammal Engineering College

BE — Electronics & Communication

Jan 1995Jan 1999

Stackforce found 100+ more professionals with Physical Design & Low Power Design

Explore similar profiles based on matching skills and experience