Jyoti Kaushik

CTO

Bengaluru, Karnataka, India25 yrs 10 mos experience
Highly Stable

Key Highlights

  • Over 25 years in VLSI and semiconductor industry.
  • Contributed to over 200 disclosures in VLSI design.
  • Expert in building and scaling engineering teams.
Stackforce AI infers this person is a leader in the semiconductor industry with expertise in VLSI design and team management.

Contact

Skills

Core Skills

Physical DesignTeam LeadershipDesignVerification

Other Skills

Methodology DevelopmentProcess ImprovementArchitecturePost Silicon ValidationASICRTL DesignSimulationsTestingSemiconductorsSoCManagementVerilogEmbedded SystemsDebuggingLeadership

About

• Experience: Over 25 years in the VLSI and semiconductor industry, with extensive tenure in senior leadership and executive roles. • Team Leadership: Specialized in building and scaling physical design and implementation teams from scratch, creating world-class engineering centers of excellence. • Innovation & IP: Prolific contributor to technological advancement with contribution to over 200 disclosures in areas of VLSI design and methodology. • Industry Recognition: Sought-after expert who has chaired and led technical committees for multiple prestigious conferences • Methodology Development: Architected and implemented end-to-end physical design flows and methodologies that have been adopted as organizational standards, significantly improving productivity, predictability, and silicon success. • Mentorship: Committed coach and mentor to both technical individuals and emerging leaders, fostering a culture of growth and excellence.

Experience

25 yrs 10 mos
Total Experience
4 yrs 11 mos
Average Tenure
1 yr 3 mos
Current Experience

L&t semiconductor technologies

Function Head - Physical Design

Feb 2025Present · 1 yr 3 mos · Bengaluru, Karnataka, India · On-site

  • Spearheaded the establishment of a Physical Design team from the ground up, focusing on strategic flow and methodology development.
  • Actively contributed to the executive leadership group, shaping company direction and decision-making processes.
  • Mentored team members to foster growth and innovation, enhancing overall team performance and morale.
  • Defined and implemented robust processes that improved project efficiency and reduced time-to-market by 25%.
Physical DesignMethodology DevelopmentTeam LeadershipProcess Improvement

Amd

Director Of Design Engineering

Oct 2016Feb 2025 · 8 yrs 4 mos · Hyderabad, Telangana, India

Arm

Engneering Manager - Test Chip

Jun 2011Sep 2016 · 5 yrs 3 mos

Freescale semiconductor

Design Manager

Jan 2006Jan 2011 · 5 yrs · Noida Area, India

  • Manaing Architecture , Design , Verification , Physical Design and post silicon validation for ARM Test Chips.
ArchitectureDesignVerificationPhysical DesignPost Silicon Validation

Intel corporation

Senior Component Design Engineer

Jan 2004Jan 2006 · 2 yrs · Bengaluru Area, India

Stmicroelectronics

Design Engineer

Jan 2000Jan 2004 · 4 yrs · Noida Area, India

Education

Netaji Subhas Institute of Technology

Master of Technology (M.Tech.) — Digital Signal Processing

Jan 1999Jan 2000

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