Manav Bansal — Software Engineer
Physical Design Engineer with 7+ years of experience in implementation of low power SoC designs spanning across Snapdragon Mobile Platform series, computing and automotive chips. I have good hands on experience with PnR tools - ICC2, Fusion Compiler and Innovus, scripting languages like Tcl and Perl and decent knowledge of sign off checks like physical verification, static timing analysis, formal verification, conformal low power analysis and dynamic IR drop analysis. Hold experience of working across multiple technology nodes ( 3nm, 4nm, 5nm, 7nm, 8nm and 11nm ) sourced from different foundries.
Stackforce AI infers this person is a Physical Design Engineer with expertise in semiconductor design and verification.
Location: Noida, Uttar Pradesh, India
Experience: 10 yrs 4 mos
Career Highlights
- 7+ years in low power SoC design.
- Expertise in PnR tools and scripting languages.
- Experience across multiple technology nodes.
Work Experience
Qualcomm
Staff Engineer (4 mos)
Senior Lead Engineer (3 yrs 1 mo)
Senior Physical Design Engineer (2 yrs)
Engineer (2 yrs 4 mos)
Motilal Nehru National Institute Of Technology
Masters Student (1 yr 6 mos)
IHS Markit
Associate (1 yr 1 mo)
Education
Master's degree at Motilal Nehru National Institute Of Technology
Bachelor’s Degree at JSS ACADEMY OF TECHNICAL EDUCATION, NOIDA