Shruti Sahu

Software Engineer

Bengaluru, Karnataka, India5 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expert in EM analysis and device modeling.
  • Hands-on experience with advanced CMOS nodes.
  • Skilled in circuit simulation and PDK validation.
Stackforce AI infers this person is a Semiconductor Engineering Specialist with expertise in PDK development and device modeling.

Contact

LinkedIn

Skills

Core Skills

Pdk DevelopmentDevice Modeling

Other Skills

Semiconductor DeviceCadence VirtuosoJiraSemiconductor Process TechnologyProgrammingSPICEComputer-Aided Design (CAD)EDAModeling and SimulationCMOSDevice Physics

About

Proficiencies: Hands-on experience in EM analysis, device modeling, and simulation across advanced CMOS nodes. Skilled in electromagnetic extraction of parasitics (RLCk), S-parameter analysis, and coupling evaluation using EMX, RaptorX, and Momentum; circuit simulation with Spectre, HSPICE, and PrimeSim; and PDK validation for devices like FinFETs, diodes, BJTs, and SRAMs. Technology Node: Worked on 22 nm, 14 nm, 10 nm, and 7nm, 18A.

Experience

5 yrs 9 mos
Total Experience
5 yrs 9 mos
Average Tenure
5 yrs 9 mos
Current Experience

Intel corporation

Component Design Engineer

Aug 2020 – Present · 5 yrs 9 mos · Bengaluru, Karnataka, India

Semiconductor DeviceCadence VirtuosoPDK DevelopmentDevice Modeling

Education

National Institute of Technology, Goa

M.tech — VLSI

Madan Mohan Malaviya University of Technology

B.tech — Electronics and Communications Engineering

Jan 2014 – Jan 2018

Stackforce found 33 more professionals with Pdk Development & Device Modeling

Explore similar profiles based on matching skills and experience

RS

Raj Shah

Ph.D. Research Scholar

at Sardar Vallabhbhai National Institute of Technology, Surat

Surat, India9 yrs 10 mos exp
Semiconductor DeviceVLSI
Nehal Gurjar

Nehal Gurjar

Tutor at kinder 2 college

at University of Southern California

Los Angeles, United States1 yr exp
Physical Design
Vikas Aryan

Vikas Aryan

Senior CAD Engineer (Integrated Photonics Solution)

at Intel Corporation

Bengaluru, India13 yrs 10 mos exp
EDAPhysical Verification
Subbulakshmi S

Subbulakshmi S

Senior cad engineer

at NVIDIA

Bengaluru, India11 yrs 8 mos exp
EDAPDKLayout Design
IP

INDRAKUMAR POLISETTY

Principal Engineer

at Micron Technology

Hyderabad, India19 yrs 8 mos exp
PDK DevelopmentAnalogPhysical Design
AA

Andrea Armanino

Executive Operations | Office of the CFO, Gusto

at Gusto

San Francisco, United States11 yrs 7 mos exp
Omkar Marathe

Omkar Marathe

PDK Library QA Lead

at Intel Corporation

Bangalore Urban, India13 yrs 6 mos exp
PDKtechnology file
VV

Venkatesh Vasudevan

Senior Technical Manager

at Intel Corporation

Bengaluru, India16 yrs 11 mos exp
Embedded SystemsIntegrated Circuit Design