Aditya Darak — Software Engineer
Power Architect / IP Designer Experienced IP and SOC RTL Design Engineer with a demonstrated history of working in the semiconductors industry. Abilities: Power Architecture Power Management RTL Design Low Power, Area / High Performance Architecture design RTL Design Design experience of systems based on ARM processors Experience in CPUs
Stackforce AI infers this person is a Semiconductor Architect specializing in Power Management and RTL Design.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 10 mos
Skills
- Power Architecture
- Rtl Design
- Ip Design
Career Highlights
- Expert in Power Architecture and RTL Design.
- Proven track record in GPU Power/Clock Architecture.
- Strong background in SoC design for premium processors.
Work Experience
Qualcomm
Staff Engineer (5 mos)
Senior Lead Engineer ( GPU Power/Clock Architecture ) (2 yrs 4 mos)
Samsung Semiconductor India
Staff Engineer (4 mos)
Associate Staff Engineer (1 yr 11 mos)
Senior Design Engineer (1 yr 8 mos)
Intern (5 mos)
MapmyIndia
Intern (3 mos)
Citi
Summer Analyst (2 mos)
Risk Latte Americas Inc.
Research Intern (6 mos)
Central Electronics Engineering Research Institute
Research Intern (2 mos)
Education
Bachelor’s Degree at Birla Institute of Technology & Science, Pilani