Aditya Darak

Software Engineer

Bengaluru, Karnataka, India7 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Power Architecture and RTL Design.
  • Proven track record in GPU Power/Clock Architecture.
  • Strong background in SoC design for premium processors.
Stackforce AI infers this person is a Semiconductor Architect specializing in Power Management and RTL Design.

Contact

Skills

Core Skills

Power ArchitectureRtl DesignIp Design

Other Skills

Power Management RTL DesignCPU Subsystem DesignOpen Source RoutingData AnalysisData TransformationPerformance OptimizationMachine LearningComputational Graph TheoryMEMS DesignSimulationComputer ArchitectureDigital DesignDigital Signal ProcessingVerilogAnalog Circuits

About

Power Architect / IP Designer Experienced IP and SOC RTL Design Engineer with a demonstrated history of working in the semiconductors industry. Abilities: Power Architecture Power Management RTL Design Low Power, Area / High Performance Architecture design RTL Design Design experience of systems based on ARM processors Experience in CPUs

Experience

7 yrs 10 mos
Total Experience
1 yr 11 mos
Average Tenure
2 yrs 9 mos
Current Experience

Qualcomm

2 roles

Staff Engineer

Dec 2025Present · 5 mos · Bengaluru

Senior Lead Engineer ( GPU Power/Clock Architecture )

Jul 2023Nov 2025 · 2 yrs 4 mos · Bengaluru

  • Working on Premium tier Mobile/Compute GPU Power/Clock Architecture and Design
  • New power reduction opportunity exploration
  • Scoping of power features
  • RTL Design for Power features
Power ArchitecturePower Management RTL DesignRTL Design

Samsung semiconductor india

4 roles

Staff Engineer

Promoted

Mar 2023Jul 2023 · 4 mos

  • Power Architecture | IP Design
  • Working on SoC design for the next generation of premium range smartphone processor
  • Worked on Power Architecture, Power IP Design, CPU Subsystem Design
Power ArchitectureIP DesignCPU Subsystem Design

Associate Staff Engineer

Mar 2021Feb 2023 · 1 yr 11 mos

Senior Design Engineer

Jun 2019Feb 2021 · 1 yr 8 mos

Intern

Jan 2019Jun 2019 · 5 mos

Mapmyindia

Intern

Aug 2018Nov 2018 · 3 mos · Delhi

  • Worked on improving the implementation of open source routing model OSRM. Used different models and historical data to improve the ETA of OSRM which drives the routing algorithm.
Open Source RoutingData Analysis

Citi

Summer Analyst

May 2018Jul 2018 · 2 mos · Pune, Maharashtra, India

  • Worked on performance data flow to fetch data from services and make it available on the customer side with required transformations, filters and mapping.
  • This project was effective in terms of time consumed for the process and also made data available at the real time. Technologies like Akka, Spark and Kafka were used to improve the performance.
Data TransformationPerformance Optimization

Risk latte americas inc.

Research Intern

Oct 2017Apr 2018 · 6 mos

  • Worked with the Computational Math and Machine Learning unit of Risk latte.
  • Major work included research, analysis and development of machine learning algorithms and models with respect to application of computational graph theory to a variety of real life problems in finance, systems biology, etc.
Machine LearningComputational Graph Theory

Central electronics engineering research institute

Research Intern

May 2017Jul 2017 · 2 mos · Pilani

  • Worked on the project Design and Simulation of MEMS-based Differential Capacitive Accelerometer under the supervision of Scientist Dr. Ravindra Mukhiya.
  • Project involved designing an accelerometer which can differentiate acceleration linearly. CAD software MEMS+ and CoventorWare were used to simulate the design.
MEMS DesignSimulation

Education

Birla Institute of Technology & Science, Pilani

Bachelor’s Degree — BE(Hons.) Electrical and Electronics Engineering and MSc(Hons.) Mathematics

Jan 2014Jan 2019

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