A

Amlan Chakrabarti

Software Engineer

Bengaluru, Karnataka, India28 yrs 4 mos experience
Highly Stable

Key Highlights

  • Expert in analog and mixed-signal IP verification
  • Proven leadership in technical staff roles
  • Strong background in functional verification methodologies
Stackforce AI infers this person is a Semiconductor Verification Expert with extensive experience in analog and mixed-signal IPs.

Contact

LinkedIn

Skills

Core Skills

Functional VerificationMixed Signal

Other Skills

VerilogSystemVerilogSoC

Experience

28 yrs 4 mos
Total Experience
8 yrs
Average Tenure
4 yrs 4 mos
Current Experience

Amd

PMTS Design Engineer

Jan 2022 – Present · 4 yrs 4 mos

  • Leading the verification of a broad range of analog and mixed-signal IPs. This includes PLLs, LDO and Temperature Sensor.
Functional VerificationMixed SignalVerilogSystemVerilog

Amd india

3 roles

Senior Member Technical Staff

Promoted

Jul 2016 – Dec 2021 · 5 yrs 5 mos

  • Leading the verification of analog and custom-digital family of IPs such as LDO, Voltage droop detector etc.
Functional VerificationMixed Signal

MTS Design Engineer

Promoted

Oct 2011 – Jun 2016 · 4 yrs 8 mos

  • Working on the verification of IPs with a strong mixed-signal content. The work involves verifying the digital logic present in the IPs and the digital-analog interfaces.
Functional VerificationMixed Signal

Senior Design Engineer

Jan 2010 – Sep 2011 · 1 yr 8 mos

Analog devices india

Technical Leader

Oct 2000 – Jan 2009 · 8 yrs 3 mos

Texas instruments india

Design Engineer

Jan 1996 – Jan 2000 · 4 yrs

Education

Jadavpur University

Bachelors — Electronics and Telcommunications

Jan 1992 – Jan 1996

St. Lawrence High School

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