Rajasekhara Rao Badana

Director of Engineering

Bengaluru, Karnataka, India25 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in Physical Design for advanced processors
  • Proven track record in GPU and AI processor implementation
  • Strong background in RTL design and verification
Stackforce AI infers this person is a Semiconductor Engineering Leader with expertise in Physical Design and SoC architecture.

Contact

Skills

Core Skills

Physical DesignSocLow-power DesignRtl Design

Other Skills

Timing ClosureVHDLStatic Timing AnalysisVLSISemiconductorsEDAICFunctional VerificationApplication-Specific Integrated Circuits (ASIC)VerilogDebuggingTCLIntegrated Circuits (IC)System on a Chip (SoC)Very-Large-Scale Integration (VLSI)

Experience

25 yrs 10 mos
Total Experience
6 yrs 5 mos
Average Tenure
6 yrs 4 mos
Current Experience

Qualcomm

Senior Director of Engineering: GPU/AI/DSP CORE Physical Design/Implementation at Qualcomm

Jan 2020Present · 6 yrs 4 mos · Bengaluru

  • Implementation and Physical Design of GPU, NPU, and DSP processors for AI, data center, compute, mobile, automotive, and IoT market segments
Timing ClosureSoCVHDLRTL designStatic Timing AnalysisVLSI+12

Intel corporation

Senior Engineering Manager - Physical Design/Implementation

Jul 2008Jan 2020 · 11 yrs 6 mos · Bengaluru

  • Structural Design/Implementation of High Performance GPU Cores and x86 Servers
Physical Design

Adavanced micro devices

Technical Lead

Dec 2004Jul 2008 · 3 yrs 7 mos · Bengaluru

  • x86 CPU Semi-Custom Implementation/Physical Design for AMD Server Market Segments
Low-power DesignEDA

Texas instruments

Senior Design Engineer

Jul 2000Nov 2004 · 4 yrs 4 mos · Bengaluru

  • Pre-Si Verification/Implementation of DSP Processors/TI Next-Generation Emulation Device, RTL Design/Implementation of 802.11 WLAN SOCs
RTL DesignFunctional Verification

Education

Birla Institute of Technology And Science (BITS), Pilani

Dual Degree

Jan 1995Jan 2000

APRS

High School

Jan 1993Present

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