Sanjay Angaitkar

Director of Engineering

Bengaluru, Karnataka, India27 yrs 4 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC/SOC design and implementation.
  • Proven track record in managing large teams across geographies.
  • Strong technical drive in project execution and management.
Stackforce AI infers this person is a Semiconductor Design Expert with extensive experience in ASIC and SOC development.

Contact

Skills

Other Skills

ASICTiming ClosureVerilogLogic SynthesisStatic Timing AnalysisFunctional VerificationVLSISoCTestingDebuggingRTL designDFTLow-power DesignPhysical Design

About

Seasoned Professional in ASIC/SOC Design & Implementation. Experience involves strong technical experience in ASIC/SOC – RTL/Netlist to GDSII project execution and management. • Physical Design Implementation and Signoff - Floorplan/Synthesis/FC/PnR/Timing/Signoff Closure, Tapeout and enabling for production. • Process: 18A, 7nm, 10nm, 12nm, 16nm, 28nm, 40nm, 55nm, 65nm, 90nm, 130nm, 180nm. • Product Definition for Server class products and analysis • Managed large teams working on multiple ASIC/SoC programs across multi-location. • Experience in Design, RTL, Integration, Synthesis, Verification ; Exposure and knowledge in DFT/ATPG. • Projects: Server SOC, Gaming ASICs/SOC, Wifi SOC, Networking SOCs, SSD controllers, DDR interfaces, Flash (ONFI/Async) interface, ARM/ARC processor-based SOCs. • Managed projects for customers across geographies (India, USA, Japan) Expertise: •Ability to build a strong motivated team and execute complex/challenging projects with high quality • Managing and Complete ownership of ASIC/SOC execution with technical drive. • Project Management: Planning & estimation, Tracking, Execution, Managing dependencies.

Experience

27 yrs 4 mos
Total Experience
6 yrs 2 mos
Average Tenure
2 yrs 7 mos
Current Experience

Amd

Director Silicon Design Engineering

Sep 2023Present · 2 yrs 7 mos · Bengaluru, Karnataka, India

Intel corporation

Director Of Engineering - SOC Physical Design

Nov 2020Sep 2023 · 2 yrs 10 mos · Bengaluru, Karnataka, India

  • Physical Design Implementation for Server SOCs

Mediatek

Manager

Nov 2014Nov 2020 · 6 yrs · Bengaluru, Karnataka, India

  • Netlist-to-GDSII for Networking, Gaming SOCs

Wipro technologies

Technical Manager

Nov 1999Oct 2014 · 14 yrs 11 mos · Bengaluru, Karnataka, India

  • Multiple ASIC, SOC from RTL2GDSII, Netlist2GDSII execution and delivery.

Controlnet india pvt ltd

Engineer

Jan 1998Jan 1999 · 1 yr

  • Involved in functional verification of the sub modules of MAC-ASIC(Gigabit Ethernet NIC )
  • Involved in Design and verification, synthesis of an ENDEC (PHY Sub layer ) interface ASIC

Education

VRCE, Nagpur

M. Tech. — Electronics

Jan 1997Jan 1999

BE — ELECTRONICS

Jan 1991Jan 1995

M. S. University Baroda

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